I looked at Bowler's thesis. The DAC chips set the performance, the FPGA is just a natural way of interfacing to them. http://www.nist.gov/pml/div688/grp10/upl

I looked at Bowler's thesis. The DAC chips set the performance, the FPGA is just a natural way of interfacing to them. http://www.nist.gov/pml/div688/grp10/upload/Bowler15_thesis-2.pdf http://www.nist.gov/pml/div688/grp10/upload/Bowler15_thesis-...