4 ms·
>> Altera's software is miles ahead of Xilinx's. Can you please expand on that ? Also what about partial reconfiguration , isn't xilinx the leader ? isn't tha
by minthd 11y ago
>> Altera's software is miles ahead of Xilinx's.
Can you please expand on that ?
Also what about partial reconfiguration , isn't xilinx the leader ? isn't that important for general compute ?
- typon 11y agoBy software I mean their place/route and synthesis tool, Quartus. The algorithms used in Quartus, based off of VPR (Versatile Place/Route) is the reason Altera is in the position they are now, relative to a decade ago when they were struggling quite a lot. Place and route in digital circuits is an NP-hard problem. Xilinx solves this problem using analytical place and route (solving a giant system of equations), explained here a bit more: http://www.xilinx.com/products/design-tools/vivado/implementation.html http://www.xilinx.com/products/design-tools/vivado/implement... Altera's tool uses Simulated Annealing. Historically, Altera's tool has been faster and easier to use, allowing user's to implement larger designs and synthesize them quicker. However, I don't know the state of things RIGHT NOW, but I'm pretty sure this was the case 2 years ago. Altera's chip design/layout is lacklustre compared to Xilinx's though. Also, partial reconfig is a very important feature, but it's not used by all customers. Most people just want large FPGAs so they can fit large designs on them, have really fast I/O (Transceivers) and meet timing on their circuits.
- minthd 11y agoI know xilinx created a whole new tools(which they releases a couple years ago), and [1] says they moved from simulated annealing. So at least according to the article, they aren't behind altera. [1]http://www.eejournal.com/archives/articles/20120501-bigdeal http://www.eejournal.com/archives/articles/20120501-bigdeal