The DEC Alpha AXP did this in something called PALcode. Unimplemented instructions generated a CPU interrupt that got handled by a PALcode emulator. If I reca

The DEC Alpha AXP did this in something called PALcode. Unimplemented instructions generated a CPU interrupt that got handled by a PALcode emulator. If I recall correctly, one of the things it did was emulate byte-wise memory operations on older processors that could only do loads and stores on double-word- or quad-word-aligned memory addresses. It was quite a bit slower than having the requisite silicon inside the CPU itself, but I don't have the numbers available. I miss the Alphas. Those machines were _awesome_.