4 ms·
Oh where to start. * Primarily, compiler technology leap frogged it to where you can do at _least_ as well with a fixed set of registers and a global allocator
by FullyFunctional 11y ago
Oh where to start.
* Primarily, compiler technology leap frogged it to where you can do at _least_ as well with a fixed set of registers and a global allocator.
* The windows were inspired by SPURS (IIRC), where it allowed a much finer granularity whereas SPARC's window is always exactly 16 registers (8 are global, and 8 overlap with the next or previous window).
* Windows turned out to be a real PITA for super scalar implementation.
* Windows assume a constrained model of computation and makes efficient tail recursion hard and co-routines impossible.
etc etc
Give me more time and I could make the list longer, but the crux is that it's another example of a misguided shorted sighted optimization (like branch delay slots, shared with many RISCs).
- FullyFunctional 11y agoSOAR, not SPURS. * The window overflow and underflow are complicated to handle correctly for the OS. * The fixed window size means a tax for deeply recursive functions that doesn't need the 16 registers.
- twic 11y agoI really liked the idea of branch delay slots too :(.
- FullyFunctional 11y agoI can promise you wouldn't once you've tried going beyond the simplest possible single issue pipeline. Thankfully branch prediction made them sort of pointless. RISC-V and Alpha are two of the better RISCs ISAs in this world and they don't have them. Read the RISC-V ISA footnotes [1] for excellent design decisions rationales. [1] http://riscv.org/download.html#tab_isaspec http://riscv.org/download.html#tab_isaspec