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The package includes a microAptiv CPU (MIPS32 Release 3) written in Verilog, a getting started guide, and various files for debugging, simulation and synthesis
by alexvoica 11y ago
The package includes a microAptiv CPU (MIPS32 Release 3) written in Verilog, a getting started guide, and various files for debugging, simulation and synthesis (free SDK, tools from Modelsim and Xilinx, etc.)