4 ms·
A good, open, microcontroller design with no caches, USB (or something), a TRNG, an onboard voltage/clock regulator, registers/RAM which zeroises on faults/pari
by qrmn 11y ago
A good, open, microcontroller design with no caches, USB (or something), a TRNG, an onboard voltage/clock regulator, registers/RAM which zeroises on faults/parity/intrusion sensors, a fresh approach to avoiding SPA/DPA attacks, some EEPROM (also with parity & zeroisation traps), and ideally a way for a host to automatically read (/audit) all the software running on it (Harvard arch?) would do the trick. It doesn't have to be fast, but it does have to be safe.
I gave it a try, but it really needs someone with actual ASIC design experience instead, I think! I'd love to see one of the vendors do something like that - as you can see there are plenty of waiting customers, but I'm not holding my breath.
Cryptech are probably the strongest contenders for now?