3 ms·

What jbangert said is the crux of the JITing problem: "compilation" for FPGAs is not really at all like compiling software, and can be hugely computationally ex

by kyboren 12y ago

What jbangert said is the crux of the JITing problem: "compilation" for FPGAs is not really at all like compiling software, and can be hugely computationally expensive. On top of that, pretty much the entire synthesis, mapping, and place and route flow is usually proprietary. That said, there have been some efforts in this direction. Search the literature for "warp processing".

diamondman 12y ago
As kyboren says fpga compiling is crazy intensive. This is because we are mapping physical resources and things have to physically fit instead of just being able to arbitrarily jump somewhere else in the program. It becomes a huge constraint satisfaction problem, there is no 'correct' answer, and many times FPGA compilers will produce different results when run multiple times because they often use randomness to start the process if there are too many options.
TuringTest 12y ago
Back in the day I learned about using VHDL to design circuits, is that the kind of compilation also used for FPGAs? That language paradigm is close to modern dataflow oriented programming languages. It should be theoretically possible to compile an application program written in that style and have the logical circuits in the FPGA be a direct mapping of the business logic in the application.
- kyboren 12y ago
  > Back in the day I learned about using VHDL to design circuits, is that the kind of compilation also used for FPGAs? FPGAs can implement any digital circuit which fits, with some caveats. So yes, VHDL is commonly used to describe designs for FPGAs. I'm not sure what you mean by '[that] kind of compilation', though, as you never specify what kind of compilation you mean. Implementing a circuit on an FPGA involves many of the same, or similar, steps and processes as implementing it on an ASIC (and obviously, does not involve all the physical design stuff). If that's what you're asking. > That language paradigm is close to modern dataflow oriented programming languages. It should be theoretically possible to compile an application program written in that style and have the logical circuits in the FPGA be a direct mapping of the business logic in the application. Sure, of course it's theoretically possible; there's nothing you can do in digital logic you cannot do on a UTM (space/memory constraints aside), and vice-versa. This field is known as "High-Level Synthesis", and it's been around for decades. It's only now becoming sort-of widely used for real-world stuff. But it's nothing like "directly translating" to logic for the FPGA ;). It's probably easier for most programmers to design in such a language vs. an HDL, but AFAIK that's not even close to the biggest challenge with doing HLS. I think timing and resource allocation are much bigger problems (but I'm not very informed about HLS!). Look through the HLS literature if you're interested in what's involved--I'm not an expert by any means. Also, if you're interested in alternative programming languages for hardware design, check out BlueSpec and Chisel.

by kyboren 12y ago

diamondman 12y ago

As kyboren says fpga compiling is crazy intensive. This is because we are mapping physical resources and things have to physically fit instead of just being able to arbitrarily jump somewhere else in the program. It becomes a huge constraint satisfaction problem, there is no 'correct' answer, and many times FPGA compilers will produce different results when run multiple times because they often use randomness to start the process if there are too many options.

TuringTest 12y ago

Back in the day I learned about using VHDL to design circuits, is that the kind of compilation also used for FPGAs? That language paradigm is close to modern dataflow oriented programming languages. It should be theoretically possible to compile an application program written in that style and have the logical circuits in the FPGA be a direct mapping of the business logic in the application.

kyboren 12y ago
> Back in the day I learned about using VHDL to design circuits, is that the kind of compilation also used for FPGAs? FPGAs can implement any digital circuit which fits, with some caveats. So yes, VHDL is commonly used to describe designs for FPGAs. I'm not sure what you mean by '[that] kind of compilation', though, as you never specify what kind of compilation you mean. Implementing a circuit on an FPGA involves many of the same, or similar, steps and processes as implementing it on an ASIC (and obviously, does not involve all the physical design stuff). If that's what you're asking. > That language paradigm is close to modern dataflow oriented programming languages. It should be theoretically possible to compile an application program written in that style and have the logical circuits in the FPGA be a direct mapping of the business logic in the application. Sure, of course it's theoretically possible; there's nothing you can do in digital logic you cannot do on a UTM (space/memory constraints aside), and vice-versa. This field is known as "High-Level Synthesis", and it's been around for decades. It's only now becoming sort-of widely used for real-world stuff. But it's nothing like "directly translating" to logic for the FPGA ;). It's probably easier for most programmers to design in such a language vs. an HDL, but AFAIK that's not even close to the biggest challenge with doing HLS. I think timing and resource allocation are much bigger problems (but I'm not very informed about HLS!). Look through the HLS literature if you're interested in what's involved--I'm not an expert by any means. Also, if you're interested in alternative programming languages for hardware design, check out BlueSpec and Chisel.