2 ms·

Processor description is here: http://www.ee.columbia.edu/~mgseok/pdfs/phoenix_isscc_dac_design_contest.pdf http://www.ee.columbia.edu/~mgseok/pdfs/phoenix_issc

• unwind 12y ago
  Thanks! No, it's definitely not ARM, that was my point. It seems to consist of "8-bit CPU, a 52x40-bit DMEM, a 64x10-bit IMEM, a 64x10-bit IROM". Those are some seriously small memory sizes, a total of 64 instructions (the IROM holds the code) really isn't a lot to play with.
  • ansible 12y ago
    Yes. Though if the silicon process technology is as good as they claim, then scaling that up a little bit (to be on-par with conventional 8-bit micros) won't be too bad. It will be interesting to see if they can maintain the kind of leakage they're talking about with a smaller process size.