3 ms·

Apple's already using the ARMv8 tagged memory to speed up Objective C on the iPhone, right? https://www.mikeash.com/pyblog/friday-qa-2013-09-27-arm64-and-you.ht

by leoc 12y ago

Apple's already using the ARMv8 tagged memory to speed up Objective C on the iPhone, right? https://www.mikeash.com/pyblog/friday-qa-2013-09-27-arm64-and-you.html https://www.mikeash.com/pyblog/friday-qa-2013-09-27-arm64-an...

lispm 12y ago
I can't see that there is any hardware support. It just makes clever use of the CPU. Also 'tagged pointers' is something slightly different than 'tagged data'. Many Lisp systems have been using both, for decades.
- pm215 12y ago
  The hardware support is that the CPU ignores the top (tag) byte of the pointer when it's used in eg a load or store instruction, so you don't have to manually mask out the tag to use the value.
hga 12y ago
Apple is using some of the bits in a normal 64 bit pointer for other purposes, something that's been done in production Lisps for a long time, no later than when the Vax appeared with its byte addressed pointers. E.g. a valid 32 bit pointer has the 2 LSB bits as zero, allowing for 3 other values and all sorts of tricks with them. By comparison, the CADR Lisp machine had a 32 bit word size, with 8 bits used for tags, and the remaining 24 bits used for immediate data or as a word addressed pointer. The lowRISC project proposes to add tag bits taken from other regions of memory that are fetched into a tag cache, and promoted as additional bits in the L2 and L1 caches and above. So starting with the L2 cache words will be internally 66 bits long.
- cmrdporcupine 12y ago
  I'm baffled why Apple's refcounting implementation doesn't do cycle collection. There are a few good algorithms for doing this for many years now. I implemented this one in C++ once: http://researcher.watson.ibm.com/researcher/files/us-bacon/Bacon01Concurrent.pdf http://researcher.watson.ibm.com/researcher/files/us-bacon/B...

3 ms·

Apple's already using the ARMv8 tagged memory to speed up Objective C on the iPhone, right? https://www.mikeash.com/pyblog/friday-qa-2013-09-27-arm64-and-you.ht

by leoc 12y ago

lispm 12y ago
I can't see that there is any hardware support. It just makes clever use of the CPU. Also 'tagged pointers' is something slightly different than 'tagged data'. Many Lisp systems have been using both, for decades.
- pm215 12y ago
  The hardware support is that the CPU ignores the top (tag) byte of the pointer when it's used in eg a load or store instruction, so you don't have to manually mask out the tag to use the value.
hga 12y ago
Apple is using some of the bits in a normal 64 bit pointer for other purposes, something that's been done in production Lisps for a long time, no later than when the Vax appeared with its byte addressed pointers. E.g. a valid 32 bit pointer has the 2 LSB bits as zero, allowing for 3 other values and all sorts of tricks with them. By comparison, the CADR Lisp machine had a 32 bit word size, with 8 bits used for tags, and the remaining 24 bits used for immediate data or as a word addressed pointer. The lowRISC project proposes to add tag bits taken from other regions of memory that are fetched into a tag cache, and promoted as additional bits in the L2 and L1 caches and above. So starting with the L2 cache words will be internally 66 bits long.
- cmrdporcupine 12y ago
  I'm baffled why Apple's refcounting implementation doesn't do cycle collection. There are a few good algorithms for doing this for many years now. I implemented this one in C++ once: http://researcher.watson.ibm.com/researcher/files/us-bacon/Bacon01Concurrent.pdf http://researcher.watson.ibm.com/researcher/files/us-bacon/B...