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Ugh, I really wish the marketing people would pick different name for this evolution of SSD drives then NVMe. At least the NVM part stating: Non-Volatile Memor

by mtanski 12y ago

Ugh, I really wish the marketing people would pick different name for this evolution of SSD drives then NVMe. At least the NVM part stating: Non-Volatile Memory. The current iteration of what we call NVM is just SSD on PCIe busses so they are not bound by the speed of SATA/SAS controllers. Maybe it's just me but when I think NVM I think of Non-Volatile Memory something like RAM that doesn't go blank when you hit the power button. And like RAM can be mapped into (kernel or user) address space. And access to them go through processor caches (L2 or L3) strait into NVM. The current SSD+ drives very much behave like the block devices of the old, just with a different host interface. Most importantly they can't be directly memory mapped without going through the page cache. That still leaves a lot of performance on the table (double copy, requiring RAM for page cache versus working set).

_wmd 12y ago
This grossly undersells and undersimplifies the value of NVMe, its wire protocol is fundamentally simplified and it features an unlimited number of queues of unlimited depth with individual interrupt (read: CPU core) routing per queue. SATA is nothing like that. Also, the term NVM has been in use since at least the 80s to refer to probably 50 different technologies by now. It's not a marketing trick
nitrogen 12y ago
Most importantly they can't be directly memory mapped without going through the page cache. It's been ages since I last did anything with PCI MMIO, but it was definitely possible to map PCI devices' own memory into a process's address space using /dev/mem, and into kernel space as well. Is there no longer an equivalent concept for PCIe? Or was MMIO always attached to real RAM?
- wmf 12y ago
  MMIO still exists but memory-mapping NAND flash isn't a good idea. Stalling the processor for ~50 us on a cache miss is likely to lead to horrible performance.
knweiss 12y ago
when I think NVM I think of Non-Volatile Memory something like RAM that doesn't go blank when you hit the power button This is the "Persistent Memory" device class. See e.g. this article for a nice summary of the status quo: https://lwn.net/Articles/636096/ https://lwn.net/Articles/636096/

by mtanski 12y ago

_wmd 12y ago

This grossly undersells and undersimplifies the value of NVMe, its wire protocol is fundamentally simplified and it features an unlimited number of queues of unlimited depth with individual interrupt (read: CPU core) routing per queue. SATA is nothing like that. Also, the term NVM has been in use since at least the 80s to refer to probably 50 different technologies by now. It's not a marketing trick

nitrogen 12y ago

Most importantly they can't be directly memory mapped without going through the page cache. It's been ages since I last did anything with PCI MMIO, but it was definitely possible to map PCI devices' own memory into a process's address space using /dev/mem, and into kernel space as well. Is there no longer an equivalent concept for PCIe? Or was MMIO always attached to real RAM?

wmf 12y ago
MMIO still exists but memory-mapping NAND flash isn't a good idea. Stalling the processor for ~50 us on a cache miss is likely to lead to horrible performance.

knweiss 12y ago

when I think NVM I think of Non-Volatile Memory something like RAM that doesn't go blank when you hit the power button This is the "Persistent Memory" device class. See e.g. this article for a nice summary of the status quo: https://lwn.net/Articles/636096/ https://lwn.net/Articles/636096/