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This article is not informative (or technical) enough, IMHO. It lacks : - The instruction set used is a MIPS-derived VLIW instruction set according to http://e

by joss82 17y ago

This article is not informative (or technical) enough, IMHO. It lacks : - The instruction set used is a MIPS-derived VLIW instruction set according to http://en.wikipedia.org/wiki/TILE64 http://en.wikipedia.org/wiki/TILE64 - It needs to say that 99% of developers don't really care about instruction set as they use higher-level languages. EDIT: A new cpu architecture is always an exciting sight, though.

rbanffy 17y ago
"EDIT: A new cpu architecture is always an exciting sight, though." Don't tell me. I would _love_ to have a workstation based on one of these. While the hypervisor is a very interesting element, I would be delighted to see a kernel taking advantage of the bare-metal partitioning scheme for managing core-affinity on processes sharing a single memory space. It's fun to imagine a thread-migration mechanism based on memory-access-hop-counting for dynamic optimization of process/thread/tile allocation.