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I thought the outcome of CISC vs RISC battle has shown that best performance comes from simpler/faster CPUs with smarter software, not vice versa.

• dkersten 17y ago
  RISC core and microcoded CISC instructions then? Still, what I meant was that the processor contains logic for some virtual machine style operations, eg keeping track of objects on the heap on-chip (or in a dedicated segment of ram/virtual address space) and having a hardware garbage collector. The main instruction set would still be RISC, but it would contain a small number of CISC instructions for allocating memory which the garbage collector then manages. As for dynamic dispatch, I guess thats not really needed, since it can be constructed from simpler instructions, but having a Python-style method dictionary lookup for member functions be performed in hardware could be interesting. Finally, if a processor had reflection and introspection features.. eg data is annotated in memory so that the structure and state of a program can be determined melodramatically at runtime (and modified). Actually, while writing this, I realise that this probably doesn't really make much sense... :-/