3 ms·
Does this play nice with caches? I know some systems like ARM allow aliases in the MMU which will ensure cache coherency, but it is system dependent and a lazy
by yifanlu 12y ago
Does this play nice with caches? I know some systems like ARM allow aliases in the MMU which will ensure cache coherency, but it is system dependent and a lazy implementation would just disable caching and slow down the code.
- Tuna-Fish 12y agoOn physically addressed cache architectures, like all x86 implementations, this has no ill effects. With virtually addressed caches like on ARM, this is generally a bad idea.