6 ms·

Imagine where we'd be today if this had taken off instead of x86...

by melloclello 12y ago

agumonkey 12y ago
What's done is done, but, some ideas may resurface later on (like closures did)
- thomasvarney723 12y ago
  What do you mean?
  - yourapostasy 12y ago
    Many of the concepts that the Lisp ecosystem pioneered/popularized are, over time, migrating into the mainstream. When you stay in the industry long enough, you will indeed see that this is not unique to Lisp: everything old eventually becomes new again. This happens as what used to be constraints in the past morph into different concerns in the present.
    - agumonkey 12y ago
      This is one of my favorite topic, it's very biological, I tend to call system features "genes" now.
      - DonHopkins 12y ago
        Jonathan Rees's a la carte menu of the elements of "object oriented programming" is a great example of that. http://www.paulgraham.com/reesoo.html http://www.paulgraham.com/reesoo.html The Elements of Object Oriented Programming: Encapsulation, Protection, Ad Hoc Polymorphism, Parametric Polymorphism, Everything Is An Object, All You Can Do Is Send A Message, Specification Inheritance, Implementation inheritance/Reuse, Sum-Of-Product-Of-Function Pattern. These are the only ones of which the news has come to Harvard, and there may be many others, but they haven't been discarvered. ;) [Apologies to Tom Lehrer.] https://www.youtube.com/watch?v=AcS3NOQnsQM https://www.youtube.com/watch?v=AcS3NOQnsQM
_delirium 12y ago
With modern hardware, I think it's not entirely obvious that specialized Lisp hardware would be a significant win. It's possible it would be, but not in the classic CISC-style approach of just baking important Lisp primitives into the instruction set. Without more, that would in practice just be implemented the way x86 is, translating the CISC-style instructions to RISC-style micro-ops, with no huge change to the basic CPU architecture. A more interesting question is whether significant architecture change would better suit some language paradigms. There was an interesting series of posts on possibilities in that direction at Yosef K's blog: http://yosefk.com/blog/the-high-level-cpu-challenge.html http://yosefk.com/blog/the-high-level-cpu-challenge.html http://yosefk.com/blog/high-level-cpu-follow-up.html http://yosefk.com/blog/high-level-cpu-follow-up.html
- DonHopkins 12y ago
  There's a lot more to making Lisp run fast than implementing parenthesis in hardware. ;)
- sklogic 12y ago
  The modern Lisp CPU may be almost the same as the modern OoO CPUs, with only a few additional bits (which would have been useful for things like JVM as well) - a hardware read and write barrier for the hardware-assisted GC, a tagged memory, a fully controllable cache prefetch and probably an additional scratchpad memory, and a smaller dedicated GC core. I'm currently working on such a design. ISA, besides the tagged memory, barriers and prefetching, does not matter much, can be a usual RISC thing.
hga 12y ago
There are serious resource issues that made that unlikely: About the time Sussman and company were getting back their first silicon, Intel was shipping the 8086 and 8088, which could, for example, address a whopping megabyte of memory. Sussman and company did one or two generations of silicon, but from what I've heard the microcode one or the latter was flawed and never really worked. They simply didn't have the resources to sufficiently simulate it before committing to silicon (I'm told there was a bit of arrogance involved as well, which I believe). Intel won and continues to win in part because of success reinforcing success, keeping their eyes on the ball, and massive investments. Process (fab lines), design, simulation, support for hardware developers (said to be a critical factor in many 808x design wins over the 68000), etc. etc. etc. I've thought of paths that might have allowed custom Lisp hardware to survive, but they're in part 20/20 hindsight (people really should have believed Moore's Law, and made a minimum gates RISC chip ASAP), in part require a quality of management that none of these MIT based efforts ever had, and almost certainly in part wishful thinking (non-recurring engineering (NRE) costs were a killer, especially combined with the need to make profits vs. that keeping the ecosystem small by shipping small numbers of units). Send me back in time with a zillion dollar budget and who knows? Short of that, as agumonkey says, what's done is done. Me, I want to see tagged architectures return (to enforce dynamic typing and make math fast by tagging each word in memory; also has potential for security, and of course helping GC).
- jacquesm 12y ago
  I think part of the reason why generalized CPUs will win over specialized ones every time is that hardware that does one thing well is invariably worse at others and we're in a 'polyglot' environment these days. So if you specialize a CPU for language 'X' it will almost automatically be worse at all the others. So the mass market will almost always favor general purpose CPUs and there may be niches where you'll find more exotic engines suited for a particular kind of computation, maybe even high level languages in hardware (greenarrays Forth offerings for instance).
  - hga 12y ago
    The key detail is economics, especially back in those days when gates were dear. One of the big things that LMI's Lambda improved on over the CADR was adding a TRW 16 bit multiply chip.... As these designs moved onto custom silicon, gates were at an extreme premium, and things like supporting the tagged architecture consumed resources that a general purpose chip could use profitably. Now I don't think that matter much at all, if your CPU is a bit bigger you sacrifice a small fraction of caching. The lowRISC project suggests NRE costs are way down (collaboration helps a lot, as well as FPGAs for prototyping) and getting significant quantities of chips on competitive processes is not insane (don't know about mask fabrication costs, but they're evidently not a showstopper). Oh, and lowRISC is looking to do two bits of tags per word, primarily for safety kludges for current not so safe languages.
pkaye 12y ago
Can you elaborate of what you think would have changed? You can still run LISP on x86 hardware.
- kyllo 12y ago
  Yes, you can still run LISP on x86 hardware, but why would you ever want to run C++ on LISP hardware?
  - lispm 12y ago
    Real running Lisp Machines provided a C compiler (not C++) for example to be able to run the X11 software on them.
kryptiskt 12y ago
It's not like Intel wanted that crude 8080-on-steroids to be the long-term future. They could dream about higher-level hardware too: http://en.wikipedia.org/wiki/Intel_iAPX_432 http://en.wikipedia.org/wiki/Intel_iAPX_432
- hga 12y ago
  And their RISC designs: https://en.wikipedia.org/wiki/Intel_i960 https://en.wikipedia.org/wiki/Intel_i960 and https://en.wikipedia.org/wiki/Intel_i860 https://en.wikipedia.org/wiki/Intel_i860 And we shouldn't forget, although many would like to, their first 64 bit processor: https://en.wikipedia.org/wiki/Itanium https://en.wikipedia.org/wiki/Itanium
  - lisper 12y ago
    The i960 was a beautiful processor. Lots of general purpose registers, nice orthogonal instruction set. It's a damn shame it didn't catch on.

Imagine where we'd be today if this had taken off instead of x86...

agumonkey 12y ago

What's done is done, but, some ideas may resurface later on (like closures did)

thomasvarney723 12y ago
What do you mean?
- yourapostasy 12y ago
  Many of the concepts that the Lisp ecosystem pioneered/popularized are, over time, migrating into the mainstream. When you stay in the industry long enough, you will indeed see that this is not unique to Lisp: everything old eventually becomes new again. This happens as what used to be constraints in the past morph into different concerns in the present.
  - agumonkey 12y ago
    This is one of my favorite topic, it's very biological, I tend to call system features "genes" now.
    - DonHopkins 12y ago
      Jonathan Rees's a la carte menu of the elements of "object oriented programming" is a great example of that. http://www.paulgraham.com/reesoo.html http://www.paulgraham.com/reesoo.html The Elements of Object Oriented Programming: Encapsulation, Protection, Ad Hoc Polymorphism, Parametric Polymorphism, Everything Is An Object, All You Can Do Is Send A Message, Specification Inheritance, Implementation inheritance/Reuse, Sum-Of-Product-Of-Function Pattern. These are the only ones of which the news has come to Harvard, and there may be many others, but they haven't been discarvered. ;) [Apologies to Tom Lehrer.] https://www.youtube.com/watch?v=AcS3NOQnsQM https://www.youtube.com/watch?v=AcS3NOQnsQM

_delirium 12y ago

With modern hardware, I think it's not entirely obvious that specialized Lisp hardware would be a significant win. It's possible it would be, but not in the classic CISC-style approach of just baking important Lisp primitives into the instruction set. Without more, that would in practice just be implemented the way x86 is, translating the CISC-style instructions to RISC-style micro-ops, with no huge change to the basic CPU architecture. A more interesting question is whether significant architecture change would better suit some language paradigms. There was an interesting series of posts on possibilities in that direction at Yosef K's blog: http://yosefk.com/blog/the-high-level-cpu-challenge.html http://yosefk.com/blog/the-high-level-cpu-challenge.html http://yosefk.com/blog/high-level-cpu-follow-up.html http://yosefk.com/blog/high-level-cpu-follow-up.html

DonHopkins 12y ago
There's a lot more to making Lisp run fast than implementing parenthesis in hardware. ;)
sklogic 12y ago
The modern Lisp CPU may be almost the same as the modern OoO CPUs, with only a few additional bits (which would have been useful for things like JVM as well) - a hardware read and write barrier for the hardware-assisted GC, a tagged memory, a fully controllable cache prefetch and probably an additional scratchpad memory, and a smaller dedicated GC core. I'm currently working on such a design. ISA, besides the tagged memory, barriers and prefetching, does not matter much, can be a usual RISC thing.

hga 12y ago

There are serious resource issues that made that unlikely: About the time Sussman and company were getting back their first silicon, Intel was shipping the 8086 and 8088, which could, for example, address a whopping megabyte of memory. Sussman and company did one or two generations of silicon, but from what I've heard the microcode one or the latter was flawed and never really worked. They simply didn't have the resources to sufficiently simulate it before committing to silicon (I'm told there was a bit of arrogance involved as well, which I believe). Intel won and continues to win in part because of success reinforcing success, keeping their eyes on the ball, and massive investments. Process (fab lines), design, simulation, support for hardware developers (said to be a critical factor in many 808x design wins over the 68000), etc. etc. etc. I've thought of paths that might have allowed custom Lisp hardware to survive, but they're in part 20/20 hindsight (people really should have believed Moore's Law, and made a minimum gates RISC chip ASAP), in part require a quality of management that none of these MIT based efforts ever had, and almost certainly in part wishful thinking (non-recurring engineering (NRE) costs were a killer, especially combined with the need to make profits vs. that keeping the ecosystem small by shipping small numbers of units). Send me back in time with a zillion dollar budget and who knows? Short of that, as agumonkey says, what's done is done. Me, I want to see tagged architectures return (to enforce dynamic typing and make math fast by tagging each word in memory; also has potential for security, and of course helping GC).

jacquesm 12y ago
I think part of the reason why generalized CPUs will win over specialized ones every time is that hardware that does one thing well is invariably worse at others and we're in a 'polyglot' environment these days. So if you specialize a CPU for language 'X' it will almost automatically be worse at all the others. So the mass market will almost always favor general purpose CPUs and there may be niches where you'll find more exotic engines suited for a particular kind of computation, maybe even high level languages in hardware (greenarrays Forth offerings for instance).
- hga 12y ago
  The key detail is economics, especially back in those days when gates were dear. One of the big things that LMI's Lambda improved on over the CADR was adding a TRW 16 bit multiply chip.... As these designs moved onto custom silicon, gates were at an extreme premium, and things like supporting the tagged architecture consumed resources that a general purpose chip could use profitably. Now I don't think that matter much at all, if your CPU is a bit bigger you sacrifice a small fraction of caching. The lowRISC project suggests NRE costs are way down (collaboration helps a lot, as well as FPGAs for prototyping) and getting significant quantities of chips on competitive processes is not insane (don't know about mask fabrication costs, but they're evidently not a showstopper). Oh, and lowRISC is looking to do two bits of tags per word, primarily for safety kludges for current not so safe languages.

pkaye 12y ago

Can you elaborate of what you think would have changed? You can still run LISP on x86 hardware.

kyllo 12y ago
Yes, you can still run LISP on x86 hardware, but why would you ever want to run C++ on LISP hardware?
- lispm 12y ago
  Real running Lisp Machines provided a C compiler (not C++) for example to be able to run the X11 software on them.

kryptiskt 12y ago

It's not like Intel wanted that crude 8080-on-steroids to be the long-term future. They could dream about higher-level hardware too: http://en.wikipedia.org/wiki/Intel_iAPX_432 http://en.wikipedia.org/wiki/Intel_iAPX_432

hga 12y ago
And their RISC designs: https://en.wikipedia.org/wiki/Intel_i960 https://en.wikipedia.org/wiki/Intel_i960 and https://en.wikipedia.org/wiki/Intel_i860 https://en.wikipedia.org/wiki/Intel_i860 And we shouldn't forget, although many would like to, their first 64 bit processor: https://en.wikipedia.org/wiki/Itanium https://en.wikipedia.org/wiki/Itanium
- lisper 12y ago
  The i960 was a beautiful processor. Lots of general purpose registers, nice orthogonal instruction set. It's a damn shame it didn't catch on.