Just to add water to your point: the MILL CPU (not implemented yet but has many radical innovations) use varying length instructions (so CISC won) yet it is a V

Just to add water to your point: the MILL CPU (not implemented yet but has many radical innovations) use varying length instructions (so CISC won) yet it is a VLIW(1) (so RISC won because the VLIW are the "sons" of RISC). Oh about the RISC vs CISC silly debate: IS is Instruction Set, which one? The one visible by the compiler/user, so saying that x86 are RISCs because their implementation use a RISC internally is st... ahem incorrect. 1: but not a classical one.