Just to clarify, the diagrams on that page are actually made with Synplify from the generated HDL. As a matter of fact, I agree with you, and we do think that v

Just to clarify, the diagrams on that page are actually made with Synplify from the generated HDL. As a matter of fact, I agree with you, and we do think that visualization is important. In our tool we have two views: if you're in a task, we show its state machine (kind of required since the input is structured code); and if you're in a network, we show a block diagram. This is how I made the pipeline in another post there: https://blog.synflow.com/hardware-acceleration/ https://blog.synflow.com/hardware-acceleration/ No waveform yet because of limited manpower, but this is on the TODO list :-)