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exactly, and there are some open-source hardware designs (on sites like OpenCores), but the problem is that with existing hardware description languages very fe
by MootWoop 12y ago
exactly, and there are some open-source hardware designs (on sites like OpenCores), but the problem is that with existing hardware description languages very few people are able to reuse and contribute to these. This is why we've created the Cx language, to make it easier to design hardware for developers, and not just hardware designers.
We've open sourced the compiler; and we've designed some open-source hardware in Cx, see for example our Ethernet MAC: https://github.com/synflow/ethernet-mac https://github.com/synflow/ethernet-mac
- poseid 12y agointeresting how you generate blocks from the language: http://cx-lang.org/documentation/structure http://cx-lang.org/documentation/structure - I guess visual feedback would make the language attractive to non-HW designers. I gave a small talk once on sharing HW projects in the browser: https://speakerdeck.com/mulderp/sharing-hardware-with-javascript https://speakerdeck.com/mulderp/sharing-hardware-with-javasc... - of course this is a different level, but still, having web/svg kinds of HW representations would be interesting. I guess for HW, good representations of schematics/waveforms are at least as important as he actual HDL, but I might be wrong.
- MootWoop 12y agoJust to clarify, the diagrams on that page are actually made with Synplify from the generated HDL. As a matter of fact, I agree with you, and we do think that visualization is important. In our tool we have two views: if you're in a task, we show its state machine (kind of required since the input is structured code); and if you're in a network, we show a block diagram. This is how I made the pipeline in another post there: https://blog.synflow.com/hardware-acceleration/ https://blog.synflow.com/hardware-acceleration/ No waveform yet because of limited manpower, but this is on the TODO list :-)