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Or did CISC win? Old CISC: Microcoded interpreters interpreting higher level ISAs. "New" CISC: JITs transpiling higher level ISAs into microcode. Old RISC: L

Or did CISC win? Old CISC: Microcoded interpreters interpreting higher level ISAs. "New" CISC: JITs transpiling higher level ISAs into microcode. Old RISC: Let's skip the middle man and deal with 80s CISC microcode directly, so as to simplify instruction decoding and pipelining. Somewhat new RISC: Oh wait, instruction decoding is trivial, at high frequencies we can't ignore the fact that i.e. multiplies inherently take longer to compute than adds, and icache density really matters in an age when DRAM is orders of magnitude slower than the SRAM it feeds. I guess we'd better start reading those Ars Technica articles on the design of the Pentium from the late 90s. Is "new" CISC wearing old RISC's clothing, or is new RISC just finally catching up to 90s "new" CISC?

gilgoomesh 12y ago
Everybody wins?
- ANTSANTS 12y ago
  Sure, we all settled relatively steadily on fruitful common ground in the end, and that's all that really matters. I just think it's ironic that people toot the RISC horn so hard in these threads when modern high performance RISC chips are much closer to the Pentium than vice versa. So many people miss that RISC was inspired by CISC microcode, not the other way around, and that the existence of complicated OoO RISC chips basically proves the RISC hypothesis (that you could keep the architecture simple to make it easy to crank clock frequencies up and up) false.
renox 12y ago
Just to add water to your point: the MILL CPU (not implemented yet but has many radical innovations) use varying length instructions (so CISC won) yet it is a VLIW(1) (so RISC won because the VLIW are the "sons" of RISC). Oh about the RISC vs CISC silly debate: IS is Instruction Set, which one? The one visible by the compiler/user, so saying that x86 are RISCs because their implementation use a RISC internally is st... ahem incorrect. 1: but not a classical one.

gilgoomesh 12y ago

Everybody wins?

ANTSANTS 12y ago
Sure, we all settled relatively steadily on fruitful common ground in the end, and that's all that really matters. I just think it's ironic that people toot the RISC horn so hard in these threads when modern high performance RISC chips are much closer to the Pentium than vice versa. So many people miss that RISC was inspired by CISC microcode, not the other way around, and that the existence of complicated OoO RISC chips basically proves the RISC hypothesis (that you could keep the architecture simple to make it easy to crank clock frequencies up and up) false.

renox 12y ago

Just to add water to your point: the MILL CPU (not implemented yet but has many radical innovations) use varying length instructions (so CISC won) yet it is a VLIW(1) (so RISC won because the VLIW are the "sons" of RISC). Oh about the RISC vs CISC silly debate: IS is Instruction Set, which one? The one visible by the compiler/user, so saying that x86 are RISCs because their implementation use a RISC internally is st... ahem incorrect. 1: but not a classical one.