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One argument I've seen: RISC is one way you can get an advantage of clock speed, die size, and power. But another way you can get an advantage in clock speed,
by IvyMike 12y ago
One argument I've seen: RISC is one way you can get an advantage of clock speed, die size, and power.
But another way you can get an advantage in clock speed, die size, and power is to go to a smaller fab process.
And given Moore's law, die shrinks marched ever on, and the next shrink was never that far away. And Intel had a boatload of money to push their fabs ahead of most everyone else.
(Yes, this is pretty hand-wavy, and you can pick a lot of nits, but I think there's a lot of truth to it.)
- Rusky 12y agoAnd combining the two ways, you get a CISC encoding turned into a RISC-like internal microcode. This is what x86 does, for example.
- notacoward 12y agoI was wondering who would point that out first. Amusingly, Intel was not the last vendor to stop running x86 instructions natively. IIRC, Cyrix was doing so well after Intel themselves had switched to the front-end-decoder ("ROP") approach.