3 ms·
I wonder what the incremental process and cost for building these will be? Intel used a silicon interposer to support a large amount of eDRAM in the recent IRI
by i_am_ralpht 12y ago
I wonder what the incremental process and cost for building these will be?
Intel used a silicon interposer to support a large amount of eDRAM in the recent IRIS graphics chips. It'd be amazing to have an ultra wide memory bus on mobile silicon...
- minthd 12y agoThe graph in [1] shows cost reduction due to 3D,With the maximum to be achieved(using 4 layers) is 50% cost reduction. http://img.deusm.com/eetimes/3p-0005-monolithic-3d-ic-02-lg.jpg http://img.deusm.com/eetimes/3p-0005-monolithic-3d-ic-02-lg....