Intel/AMD already handles flag-setting in this fashion because the vast majority of ALU instructions have a flag side-effect. There is an additional latency to

Intel/AMD already handles flag-setting in this fashion because the vast majority of ALU instructions have a flag side-effect. There is an additional latency to get flag results. The latency is not paid unless you depend on them. Overwriting is not a dependency. Other architectures get around the cost altogether by having a separate "set" bit in their ISA, e.g ARM. If you don't want flags modified, then don't specify it, e.g ADD instead of ADDS. I think you are quite mistaken by multiple orders of magnitude how much power cost it would have, especially when taking into account the rest of the system.