I'm not sure that the Extremetech page allows concluding much on its own regarding MIPS efficiency vs. others as the implementations are pretty different and th

I'm not sure that the Extremetech page allows concluding much on its own regarding MIPS efficiency vs. others as the implementations are pretty different and the only MIPS instance is an oddball: it's OoO and 4-wide as the i7, while being on a very old process (90nm) while the all other chips are on better processes, and the 3 or 4 wide ones on 32 nm. 3 process generations tends to have an impact on efficiency ;) Also on this topic: if the original MIPS was indeed very simple, recent versions added thumb-like code compression, SIMD extensions, DSP extensions... As everyone else does really. And you can get similar CPU benchmarks level as other architectures. Then the very same instruction architecture can have pretty wide power efficiency differences depending on implementations. Just look at Atom vs. Core, A8 vs. 15... Even the same model shows big differences based on implementation choices (optimize for speed vs. area/cost for example). As someone working on SoC, I believe the key difference in MIPS vs. ARM vs. Intel is not so much the instruction set, but the work effort spent on optimizing the implementations close to the processes. It's pretty obvious for Intel, but ARM spends a lot of time with the big foundries (TSMC, GlobalFoundries, Samsung) to make sure their implementation are well tuned. And they pass on the know-how to their customers through what they call "POPs" (Process Optimization Packages). This is important for ARM, but also for the foundries as ARM is the de facto standard in mobile. A lot of work go in this, and it shows at the high end. MIPS/Imagination recently propose something similar for MIP, but they're far from having the same amount of resources. That's the main difference between MIPS and ARM at the high-end IMHO.