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"FPGA is the least efficient way to accomplish anything" Define 'efficient'. If you're talking about cost, it costs far less than an asic below a certain volume

"FPGA is the least efficient way to accomplish anything" Define 'efficient'. If you're talking about cost, it costs far less than an asic below a certain volume, and it certainly costs less in tooling and development. "FPGA's are hot and slow" - compared to a full custom IC? Sure. FPGA's improve with every process generation (like all silicon devices) and an ASIC design won't intrinsically take advantage of those advances; an FPGA design that didn't meet it's power or thermal envelope 5 years ago might easily do so now, without incurring the NRE of the ASIC - add to that the fact that the first stage of the ASIC design can be prototyped via the FPGA, and you have a viable product without the risk of a bad ASIC. I've been involved in converting several Virtex-2 designs to newer devices - the huge reduction in power and increase in available logic has led to some extremely impressive gains. There is work to do in such a conversion, but it is understood work - there's no real mystery to updating the CoreGen components. Agree it is a useless article though, because digital logic design is not programming (it is architectural work). There is no 'abstracting' that away - all attempts thus far have failed miserably (Vivado HLS, for example, turns out designs that work but are HUGE compared to what even a passable designer can do).

aninhumer 12y ago
>There is no 'abstracting' that away While hardware design often has awkward constraints that make generalised abstractions tricky, there is still a lot that can be done to improve over Verilog or VHDL. I've been working in Bluespec for a couple of years now, and the difference is night and day. Having a modern type system in our HDL makes experimentation and iteration so much easier.
minthd 12y ago
You can still abstract lots of it. For example chisel[1] does so through high level abstractions and parametrized generators - while still offering results equal to verilog.It's also also used for the open source risc-V architecture[4], the recent highly-efficient parallel cpu[2] done by a small start-up(2 guys),and a floating-point alu generator[3] that explores the design space of fpu's and finds optimal designs. And reading about these projects, one gets the impression chisel was critical for them. [1]https://chisel.eecs.berkeley.edu/chisel-dac2012.pdf https://chisel.eecs.berkeley.edu/chisel-dac2012.pdf [2]http://www.eetimes.com/document.asp?doc_id=1324759 http://www.eetimes.com/document.asp?doc_id=1324759 [3]http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=6545888&url=http%3A%2F%2Fieeexplore.ieee.org%2Fxpls%2Fabs_all.jsp%3Farnumber%3D6545888 http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=654588... [4]http://www.eetimes.com/author.asp?doc_id=1323406 http://www.eetimes.com/author.asp?doc_id=1323406
bsder 12y ago
> it costs far less than an asic below a certain volume And that's it. That is the ONLY place where an FPGA makes sense--"I'd like to have an ASIC, but I can't afford the NRE." There is no technological axis in which an FPGA is superior to anything.

aninhumer 12y ago

>There is no 'abstracting' that away While hardware design often has awkward constraints that make generalised abstractions tricky, there is still a lot that can be done to improve over Verilog or VHDL. I've been working in Bluespec for a couple of years now, and the difference is night and day. Having a modern type system in our HDL makes experimentation and iteration so much easier.

minthd 12y ago

You can still abstract lots of it. For example chisel[1] does so through high level abstractions and parametrized generators - while still offering results equal to verilog.It's also also used for the open source risc-V architecture[4], the recent highly-efficient parallel cpu[2] done by a small start-up(2 guys),and a floating-point alu generator[3] that explores the design space of fpu's and finds optimal designs. And reading about these projects, one gets the impression chisel was critical for them. [1]https://chisel.eecs.berkeley.edu/chisel-dac2012.pdf https://chisel.eecs.berkeley.edu/chisel-dac2012.pdf [2]http://www.eetimes.com/document.asp?doc_id=1324759 http://www.eetimes.com/document.asp?doc_id=1324759 [3]http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=6545888&url=http%3A%2F%2Fieeexplore.ieee.org%2Fxpls%2Fabs_all.jsp%3Farnumber%3D6545888 http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=654588... [4]http://www.eetimes.com/author.asp?doc_id=1323406 http://www.eetimes.com/author.asp?doc_id=1323406

bsder 12y ago

> it costs far less than an asic below a certain volume And that's it. That is the ONLY place where an FPGA makes sense--"I'd like to have an ASIC, but I can't afford the NRE." There is no technological axis in which an FPGA is superior to anything.