I think it's fair, despite long-time predjudices - to think of the x86 architecture to be midway between RISC and CISC - most instructions (push/etc being the n

I think it's fair, despite long-time predjudices - to think of the x86 architecture to be midway between RISC and CISC - most instructions (push/etc being the notable exception) make a single memory reference and no addressing mode does a memory indirect or has addressing side effects (auto incs/etc)- that means that instructions are retryable (don't ever need to be able to be restarted in the middle after a page fault) with a single dcache/TLB port