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If you are interested, I did some research on extremely fast, lower power, and low noise filtering using FPGAs or CPLDs.
by alecdibble 12y ago
If you are interested, I did some research on extremely fast, lower power, and low noise filtering using FPGAs or CPLDs.
- reportingsjr 12y agoI am interested if you are willing to share!
- alecdibble 12y agohttps://news.ycombinator.com/item?id=8592292 https://news.ycombinator.com/item?id=8592292 Link to my reply. :)
- deutronium 12y agoSure, that sounds cool! (I've got a cheap FPGA dev board that's got an ADC/DAC on, that I wouldn't mind putting to good use)
- alecdibble 12y agoMost of the research work was targeting a specific development paltform, so I don't have good instructions for doing it generally. Here is the paper we based our research off of: http://www.eecg.toronto.edu/~johns/ece1371/papers/1993_lewis.pdf http://www.eecg.toronto.edu/~johns/ece1371/papers/1993_lewis... Here is my presentation poster which should explain the motivation and theory a little more clearly than the paper: https://www.ece.ucsb.edu/academics/undergrad/capstone/event-2012/presentations/flexSD-poster.pdf https://www.ece.ucsb.edu/academics/undergrad/capstone/event-... I graduated before we got it releasable, and haven't had much time with my job to finish up the project. I don't have more time to add to this explanation, but if you want more info or implementation help, feel free to email me: alecdibble at gmail dot com.