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I am still fascinated by the sheer number of RISC CPUs out there. But more amazing than this is their similarity. I think we should develop a new (abstract) RIS

by s-macke 12y ago

I am still fascinated by the sheer number of RISC CPUs out there. But more amazing than this is their similarity. I think we should develop a new (abstract) RISC CPU which combines all in one architecture :-) . Joking apart, as a developer of jor1k I am also interested in RISC-V and constantly follow their progress. I am still not sure, if RISC-V is just OpenRISC 2.0 or a competitor. The technical keypoints of criticism of the OpenRISC architecture are true, but show me an architecture, which is free of bad design decisions? The problem is usually not to build a new instruction set. It is in fact the easiest part I would say. The most time consuming part is to build the toolchain including, emulators, Linux, gcc, binutils, libc and tons of architecture dependent libraries and programs (gdb, strace, ltrace, libffi, xpcom, ...) . And here RISC-V begins again from scratch which is a little bit sad. You forgot to tell, that the RISC-V team build their own Javascript based emulator at https://github.com/ucb-bar/riscv-angel https://github.com/ucb-bar/riscv-angel

otoburb 12y ago
I didn't even realize they had built their own JS emulator. I'm not sure why they didn't choose to adopt much of the OpenRISC work - was hoping that their FAQ would have had more details, but it only referenced the blog post. However, it seems they're rather committed and have funding, so hopefully they can carry on the open and free RISC torch, whether alongside or via convergence with OpenRISC.
userbinator 12y ago
But more amazing than this is their similarity They're all somewhat MIPS-like, and that's mostly due to their heritage and the relative ease of creating them. What's more, they all seem to have similar (not so great) performance characteristics. Currently the only "RISC" ISA that has good performance/efficiency characteristics is the ARM, and that one has some very un-MIPS-like predicated instructions, combined shifts, and more complex addressing modes (including post-inc/decrement.) Meanwhile, what AMD and Intel have done with x86 both in terms of performance and efficiency has been quite amazing, so I think what would be interesting to see is an OpenCISC/x86 that draws some inspiration from them, or at least something more ambitious and imaginative than yet-another-MIPS-clone. Otherwise, seeing all these projects attempting to revive the RISC fad, which is long over, feels rather misguided.

by s-macke 12y ago

otoburb 12y ago

I didn't even realize they had built their own JS emulator. I'm not sure why they didn't choose to adopt much of the OpenRISC work - was hoping that their FAQ would have had more details, but it only referenced the blog post. However, it seems they're rather committed and have funding, so hopefully they can carry on the open and free RISC torch, whether alongside or via convergence with OpenRISC.

userbinator 12y ago

But more amazing than this is their similarity They're all somewhat MIPS-like, and that's mostly due to their heritage and the relative ease of creating them. What's more, they all seem to have similar (not so great) performance characteristics. Currently the only "RISC" ISA that has good performance/efficiency characteristics is the ARM, and that one has some very un-MIPS-like predicated instructions, combined shifts, and more complex addressing modes (including post-inc/decrement.) Meanwhile, what AMD and Intel have done with x86 both in terms of performance and efficiency has been quite amazing, so I think what would be interesting to see is an OpenCISC/x86 that draws some inspiration from them, or at least something more ambitious and imaginative than yet-another-MIPS-clone. Otherwise, seeing all these projects attempting to revive the RISC fad, which is long over, feels rather misguided.