5 ms·

I'm going to remain skeptical until they publish more details. The report[0] linked from their homepage seems to contain more/better information, but it's not m

by lgeek 12y ago

I'm going to remain skeptical until they publish more details. The report[0] linked from their homepage seems to contain more/better information, but it's not much. What seems pretty clear is that they use a proprietary ISA and have developed dynamic binary translators for ARM and x86 code. It's not clear if it's a VLIW architecture or if the ISA has any other properties required by the hardware. From this report it sounds like they're essentially doing thread-level speculation in hardware. Based on the linked article I would have been tempted to think they have reconfigurable pipelines, but based on the report I'm somewhat sure it was just a misunderstanding. I generally think it's a bad sign when a company implements relatively well known concepts from research and then doesn't use the standard terminology and tries to pitch their creation as something 100% new and original. In any case, there's no need to rush a judgment, I guess they'll publish better technical information in time. [0] http://www.softmachines.com/wp-content/uploads/2014/10/MPR-11303.pdf http://www.softmachines.com/wp-content/uploads/2014/10/MPR-1...

ChuckMcM 12y ago
Came here to say exactly the same thing. I get that you could create a fabric of hard cores which could be combined into a complete execution pipeline, and I love the idea of imagining something like an FPGA with integer execution units rather than complex logic blocks as building blocks. But it feels like the Lego Technic kit that builds a motorcycle, sure you can build anything you want with the parts, but the motorcycle is the only thing that makes sense. In the same way I wonder if a programmable fabic layered over a series of chip building blocks wouldn't resolve down to a 'best' (or 'least bad') solution and nothing else, at which point why not just add a metal mask and make the chip non programmable?

by lgeek 12y ago

ChuckMcM 12y ago

Came here to say exactly the same thing. I get that you could create a fabric of hard cores which could be combined into a complete execution pipeline, and I love the idea of imagining something like an FPGA with integer execution units rather than complex logic blocks as building blocks. But it feels like the Lego Technic kit that builds a motorcycle, sure you can build anything you want with the parts, but the motorcycle is the only thing that makes sense. In the same way I wonder if a programmable fabic layered over a series of chip building blocks wouldn't resolve down to a 'best' (or 'least bad') solution and nothing else, at which point why not just add a metal mask and make the chip non programmable?