5 ms·

Modern CPU's do this on very limited level by basically looking at the instructions and executing those in parallel which have no dependencies with eachother.

Modern CPU's do this on very limited level by basically looking at the instructions and executing those in parallel which have no dependencies with eachother. The thing I'm wondering the most is that how on earth can they get so many instructions per clock with short pipeline? Without knowing the details on how they compiled the SPEC benchmark it's really hard to say. Who knows, maybe they cheated and ran parts of the benchmark parallel on their cpu and not on others, with "It's the natural way for this chip!" as an excuse.

lgeek 12y ago
What superscalar and out-of-order processors are exploiting is instruction level parallelism, while their technology seems to use thread level speculation. > Without knowing the details on how they compiled the SPEC benchmark it's really hard to say. Who knows, maybe they cheated and ran parts of the benchmark parallel on their cpu and not on others That's most likely the case, but I wouldn't consider it cheating. As long as from the software perspective only a single thread is running (and SPEC CPU 2000 and 2006 are single threaded), I think it's fair game. The whole point of their project is to expose parallelism without requiring the programmer / execution environment to explicitly support it.
- sharpneli 12y ago
  > seems to use thread level speculation If the software is compiled into a normal single threaded program then what else there is left except instruction level parallelism? And if you can compile it to work with two threads then we have Hyperthreading to take advantage of that even with a single core. Their [Soft Machines] latest patent is about basically an OoO method in overdrive, it abuses only instruction level parallelism. And based on that their claim that their pipeline would be short is not really valid.
  - cfallin 12y ago
    Thread-level speculation is exploiting ILP. In some contexts it's compiler-assisted but in this context I would imagine it is fully microarchitectural (i.e., in hardware/translation firmware, running a single instruction stream of user code, invisible to the user). Dynamic multithreading (Akkary 1998?) did this by splitting the thread at predictable points like function calls/returns and (IIRC) backward branches. So it's still ILP within a single thread, but at a much longer distance than what an OoO scheduling window provides.

lgeek 12y ago

What superscalar and out-of-order processors are exploiting is instruction level parallelism, while their technology seems to use thread level speculation. > Without knowing the details on how they compiled the SPEC benchmark it's really hard to say. Who knows, maybe they cheated and ran parts of the benchmark parallel on their cpu and not on others That's most likely the case, but I wouldn't consider it cheating. As long as from the software perspective only a single thread is running (and SPEC CPU 2000 and 2006 are single threaded), I think it's fair game. The whole point of their project is to expose parallelism without requiring the programmer / execution environment to explicitly support it.

sharpneli 12y ago
> seems to use thread level speculation If the software is compiled into a normal single threaded program then what else there is left except instruction level parallelism? And if you can compile it to work with two threads then we have Hyperthreading to take advantage of that even with a single core. Their [Soft Machines] latest patent is about basically an OoO method in overdrive, it abuses only instruction level parallelism. And based on that their claim that their pipeline would be short is not really valid.
- cfallin 12y ago
  Thread-level speculation is exploiting ILP. In some contexts it's compiler-assisted but in this context I would imagine it is fully microarchitectural (i.e., in hardware/translation firmware, running a single instruction stream of user code, invisible to the user). Dynamic multithreading (Akkary 1998?) did this by splitting the thread at predictable points like function calls/returns and (IIRC) backward branches. So it's still ILP within a single thread, but at a much longer distance than what an OoO scheduling window provides.