Yes, the two key hurdles to HDL are (in my opinion): - Being able to think parallel. Software is sequential by default, HDL is parallel by default. - Understa

Yes, the two key hurdles to HDL are (in my opinion): - Being able to think parallel. Software is sequential by default, HDL is parallel by default. - Understanding what you want to build. If you can't draw what you want, you probably can't write good HDL. There's a reason it's called Hardware Description Language, and not "JS2GATES". In a sense, HDL is really just text-based schematics. Case in point: http://www.allaboutcircuits.com/vol_5/chpt_7/8.html http://www.allaboutcircuits.com/vol_5/chpt_7/8.html When you think "HDL" you probably think of Verilog or VHDL, but SPICE netlists is also an HDL.