2 ms·
What would be fun is to design a processor of this architecture in VHDL.
by rthomas6 12y ago
What would be fun is to design a processor of this architecture in VHDL.
- Vendan 12y agoissue is the simulated "processor" is actually interpreting asm source code on the fly. Direct string parsing on an fpga, including string to int, i.e. "1234" -> 1234, would make it extremely "fun"