Because reasoning about hardware is hard it's important to be able to rely on simulation. I'm not saying that all issues can be caught/detected in simulation bu

Because reasoning about hardware is hard it's important to be able to rely on simulation. I'm not saying that all issues can be caught/detected in simulation but many can. In most designs 90% of the code (typically the synchronous logic) can be fully debugged in simulation. Ok there is still a portion that can't be debugged, and you'll likely spend a large amount of time on that final 10% but the alternative is certainly worse. A good designer can avoid constructs that can't be or are very hard to simulate correctly. A good example is signals that have to cross clock domains, metastability is easily missed in simulation and the problems it causes in actual hardware are huge. Good hardware design tries to avoid or encapsulate these kind of constructs. Beyond this you still have to deal with the analogue world and that is often hard to simulate. Clock generators that misbehave, working with memory controllers (and buggy IP cores): it's not all under your control and that why hardware design often feels so hard. A lot of time is spend on these issues, but that's only because the rest is made easy by using VHDL.