It would be interesting to see what could be done with large scale combinational logic (ie. boolean circuits). If you didn't have to worry about clock signals,

It would be interesting to see what could be done with large scale combinational logic (ie. boolean circuits). If you didn't have to worry about clock signals, had a simple circuit topology (for example laminar) and thermal issues were minimal because of having a small number of gates transitioning at any one time could you design a programmable logic chip that was more competitive with ASICS than current FPGAs are ?