RISC chips have done this for a while. Oracle's T5 Niagara was something like 256 execution threads per socket. Power8 (also a RISC chip) supports 96 execution

RISC chips have done this for a while. Oracle's T5 Niagara was something like 256 execution threads per socket. Power8 (also a RISC chip) supports 96 execution threads per socket. Most of a modern x86_64 chip is cache, and other System On Chip components (memory controller, PCIe controller, built in GPU), not necessarily what in the 80's and 90's we'd call the CPU.