> This is probably a consequence of pipelining in the ALU itself. Yep, the P4 "fast ALU" was double-pumped and did 16-bit chunks of a 32-bit add/sub in adjacen

> This is probably a consequence of pipelining in the ALU itself. Yep, the P4 "fast ALU" was double-pumped and did 16-bit chunks of a 32-bit add/sub in adjacent half-cycles [1]. This meant that dependent chains of, e.g., adds could still issue back-to-back, since the first half of a dependent instruction requires only the low 16 bits of its sources. Always struck me as very clever! [1] http://www.ecs.umass.edu/ece/koren/ece568/papers/Pentium4.pdf http://www.ecs.umass.edu/ece/koren/ece568/papers/Pentium4.pd...