The state of the X86 memory model before 2009 was quite poor [1]. All Intel had to offer was a whitepaper on memory ordering and it contained terms which weren

The state of the X86 memory model before 2009 was quite poor [1]. All Intel had to offer was a whitepaper on memory ordering and it contained terms which weren't defined like "causality" and "transitive visibility". As a person who lives in these trenches, I cannot stop myself from pushing others to read the fantastic X86-TSO paper by Sewell et al [2]. It gives a clear, easily understood view of the memory model. Their earlier, more in-depth paper, is here [3]. [1] http://www.mpdiag.com/intel_arch.html http://www.mpdiag.com/intel_arch.html [2] http://www.cl.cam.ac.uk/~pes20/weakmemory/cacm.pdf http://www.cl.cam.ac.uk/~pes20/weakmemory/cacm.pdf [3] http://www.cl.cam.ac.uk/~pes20/weakmemory/x86tso-paper.pdf http://www.cl.cam.ac.uk/~pes20/weakmemory/x86tso-paper.pdf