3 ms·
Mind blown indeed. But don't these need special CPU instructions? Which x86 instructions do this? (Or is this done through a special hardware pin on the CPU?)
by wfunction 12y ago
Mind blown indeed. But don't these need special CPU instructions? Which x86 instructions do this? (Or is this done through a special hardware pin on the CPU?)
- simcop2387 12y agoApparently it's done through controlling the MTRR registers on the CPU: http://rere.qmqm.pl/~mirq/cache_as_ram_lb_09142006.pdf http://rere.qmqm.pl/~mirq/cache_as_ram_lb_09142006.pdf