4 ms·

that is a very interesting project. How does the 170ns latency compare to others? This isn't really my area of expertise :p

• pjc50 12y ago
  Extremely well; 170ns is the length of the incoming market data packet, and the reply starts immediately on end of incoming packet. It takes more than that just to DMA a packet into main memory from PC gbit interface.
  • chton 12y ago
    That is very cool. Where would you go from there? It seems if you're already so fast that you can start replying as soon as all the data is received, there isn't much more you can do. Or are there techniques for going beyond that?
    • pjc50 12y ago
      You can push the start of the reply earlier than the end of the input with some tricks. Beyond that you're limited by causality.
      • minimax 12y ago
        The bit of the video where he talks about writing the order to the wire and then flubbing the checksum if he doesn't actually want to send the order was nuts. I work in the industry and I had heard of people using FPGAs on switches but not that particular technique. Thanks for posting that.
      • chton 12y ago
        Damn that causality. High performance would be so much easier if causality wasn't there :p