It's interesting that x86 only seems to have TLB tagging for VM guest/host switching usage. Regular context switches require TLB flushing, which (reading the Li

It's interesting that x86 only seems to have TLB tagging for VM guest/host switching usage. Regular context switches require TLB flushing, which (reading the Linux kernel) either flush the entire TLB or a specific set of entries. I'm surprised no (more) tagging is used here for regular switches. Just not worth it? Edit: A colleague pointed me to this: http://www.google.com/patents/US6510508 http://www.google.com/patents/US6510508 which is used by recent AMD cpus. Anyone know any resource that has more info like this centralized?