If you can figure out how to put enough memristors in parallel, the transfer speed is essentially unlimited. It's the access time (latency) that is crucial, and

If you can figure out how to put enough memristors in parallel, the transfer speed is essentially unlimited. It's the access time (latency) that is crucial, and makes all the difference, because it is inherent to the technology, and cannot be changed regardless of how many elements you string together. This explains it well: http://rescomp.stanford.edu/~cheshire/rants/Latency.html?HN_report=1 http://rescomp.stanford.edu/~cheshire/rants/Latency.html?HN_... Several new non-volatile memory technologies have achieved latency down to 100 picoseconds. This is an order of magnitude faster than the L1 cache on a CPU (SRAM). CPU power will again becomes the bottleneck, instead of storage. We will have to build completely new CPU architectures to make us of this though.