5 ms·

This would be interesting, but it looks like it has been barely started - the CPU is barely what I would call a CPU, let alone a Lisp interpreter. Verilog isn'

This would be interesting, but it looks like it has been barely started - the CPU is barely what I would call a CPU, let alone a Lisp interpreter. Verilog isn't a programming language (it tries to be, unfortunately). For synthesis, it is a hardware description language. Someday I'll write up some decent Verilog tutorials because there aren't any good ones on the Internet.

jff 12y ago
My thoughts exactly. When I saw "Perhaps the Verilog language is not so good, because some nice standard language featuers (forever-loop etc.) are missing in the Xilinx-Tools.", I had flashbacks to VHDL class, students writing loops and then wondering why they couldn't synthesize the code. You have to get yourself into a hardware mindset, thinking about clocks and state machines and enable lines rather than infinite loops.
- AceJohnny2 12y ago
  Yeah, it looks like this guy needs to learn more Verilog before he can make progress on the CPU implementation. It reminds of teaching some VHDL in a hackerspace a few years ago (I had learned it in college some years previously), and this software guy was constantly trying to write functions and loops, and was having trouble with the concept that all signals were propagated concurrently rather than sequentially! Sure, it looks like code (in fact, VHDL's syntax is purposefully similar to ADA), but it sure isn't code.
  - skylan_q 12y ago
    Sure, it looks like code (in fact, VHDL's syntax is purposefully similar to ADA), but it sure isn't code. Computer science grad here. I had to keep reminding myself about the HDL part of VHDL. It's not algorithmic description like programming is, but hardware description.
  - spacemanmatt 12y ago
    Would it be fair to describe it as concurrently executed code?
    - AceJohnny2 12y ago
      hah, that's only the tip of the iceberg... From memory: - HDL code doesn't have variables the way programming code does. Sure, you can store state in latches (and other more roundabout ways), but a good design tries to avoid this. - You can have "functions" that take parameters, but what you're really doing is instantiating blocks of hardware according to said parameters. - Instead of variables to functions, what you really care about is signals as input and output to hardware blocks. (and ultimately at the final hardware implementation, propagation time and power of said signals. Especially the clock. OMG the clock...) Honestly, I found VHDL made complete sense from approaching it after drawing digital circuit diagrams, as the description code mapped pretty clearly to that. Approaching it from an "imperative programming" background makes little sense, and saying it's "concurrent programming" just ends up confusing the issue more, IMHO.
      - ioseph 12y ago
        Absolutely agree with learning digital circuit design first. Before writing a single line of HDL, you should know exactly what you want to be synthesized. Unfortunately all to many courses approach like learning a new programming language. To me this is like teaching CAD before teaching how to draw a rectangle.
    - ohyes 12y ago
      It's more like wiring together a series of tubes. The signal has to propagate from one end of the tubes to the other in a single clock cycle. Note that the tubes can go backwards, so you can feed the output of the tube into the next input of itself. Hardware programming like this is actually extremely fun, but for some reason the widely available languages for doing it suck. And make what is going on in the hardware opaque and difficult to understand for any non trivial applications. (We're talking 100000s of lines of code to do anything nontrivial).
    - MootWoop 12y ago
  - austinz 12y ago
    It's funny, because in some cases you can write HDL code that looks like a loop - but in this context a loop instantiates multiple instances of some piece of logic.
    - AceJohnny2 12y ago
      Exactly. And this kind of distinction was what we were having trouble conveying to said software guy (I say this as a software guy myself), and I think the author of the LISP CPU is having the same problem.
      - derefr 12y ago
        I think I'd explain that particular bit by simply saying that there was no run-time looping construct, only a compile-time looping macro to generate runtime code. Most software people would get that, I think.
  - read 12y ago
    this guy needs to learn more Verilog That's not a bad thing. Maybe this is why a Lisp processor doesn't exist. Not only do you have to know Lisp well, which only a minority of programmers do, but you also need to want to know hardware. Which is something software people don't want to do. This guy already has a leg up. For some strange reason I can't explain it's easier to imagine a software guy building hardware than a hardware guy writing a Lisp.
    - jff 12y ago
      That seems odd when you consider that a Lisp can be implemented in, what, a couple hundred lines of C? All the guys who can design a processor know how to program, and it's not like Lisp is totally magical. Now, most people who do primarily hardware work probably aren't that interested in Lisp, because there's not really much Lisp focus out there. I'm a computer engineer, I know how to write HDL and lay silicon, I like Lisp... actually it would be a pretty fun project to do in an FPGA.
      - read 12y ago
        They know how to program. Do they know what to program?
  - derefr 12y ago
    > this software guy was constantly trying to write functions and loops, and was having trouble with the concept that all signals were propagated concurrently rather than sequentially! Sounds like he hadn't written much software in a language with an actor-model. It's not nearly as hard a jump to VHDL if you've ever debugged an Erlang supervision tree, or a miscommunicating set of SOA web services.
  - romaniv 12y ago
    If you teach Verilog without explaining why it has loops and what they do (and don't do), you don't teach it correctly. Behavioral descriptions are very, very similar to programming, and a lot of programming concepts and skills (e.g. modularization) translate very well to HDLs. The only thing in HDLs I remember that is totally alien to programmers is propagation delays. Well, even that is somewhat similar to multi-threading issues.
alain94040 12y ago
Let me know when you do so, I can help.
iso8859-1 12y ago
Won't you help us write this one: https://en.wikibooks.org/wiki/Programmable_Logic/Verilog https://en.wikibooks.org/wiki/Programmable_Logic/Verilog ?
- alain94040 12y ago
  I took a look and I don't know where to start. The table of content is completely different from how I would introduce the concepts. The site says "This book requires that you first read Digital Circuits", which is a good point, so maybe most of the design/Verilog content should go there instead. Unfortunately, the digital circuit book also doesn't have a modern table of content: SR flip-flops and 7400TLS are not exactly related to Verilog much at all. Is there a place where such issues can be discussed? EDIT: I started https://en.wikibooks.org/wiki/Programmable_Logic/Verilog_for_Software_Programmers https://en.wikibooks.org/wiki/Programmable_Logic/Verilog_for...
  - jff 12y ago
    Both "books" are kind of regrettable, but SR flip-flops and 7400-type logic gates are essential background knowledge for writing HDL. You'll have a hard time describing hardware if you don't know what kind of hardware you're trying to describe... Verilog looks vaguely C-ish, but in the end you're describing how to connect up a bunch of flip-flops and logic gates.
    - adwn 12y ago
      In modern digital hardware design, you only use D flip-flops (with some very rare exceptions), so teaching SR, JK etc. is not only unnecessary, but also confusing to beginners. Showing how to build them from gates is even worse, because it's typically wrong and results in a level-triggered latch (which you don't use in modern digital hardware design). You don't build more complex functions like adders or multiplexers from individual gates anymore, so don't put beginners into this outdated mindset. Sure, explain how to build a half-adder from ANDs and XORs, but make it clear that they shouldn't do this for anything except experimentation; you don't need any specific parts like the 7400s for this. Instead, teach them proper design techniques with HDLs (as horrible as VHDL and Verilog are, they are better than schematic designs).
feider 12y ago
Just let us know when you have writen some tutorials - Im waiting :)
theon144 12y ago
Please do! I've wanted to learn FPGAs for years now, never really got around to it because it's really so niche there's not that much quality tutorials.

jff 12y ago

My thoughts exactly. When I saw "Perhaps the Verilog language is not so good, because some nice standard language featuers (forever-loop etc.) are missing in the Xilinx-Tools.", I had flashbacks to VHDL class, students writing loops and then wondering why they couldn't synthesize the code. You have to get yourself into a hardware mindset, thinking about clocks and state machines and enable lines rather than infinite loops.

AceJohnny2 12y ago
Yeah, it looks like this guy needs to learn more Verilog before he can make progress on the CPU implementation. It reminds of teaching some VHDL in a hackerspace a few years ago (I had learned it in college some years previously), and this software guy was constantly trying to write functions and loops, and was having trouble with the concept that all signals were propagated concurrently rather than sequentially! Sure, it looks like code (in fact, VHDL's syntax is purposefully similar to ADA), but it sure isn't code.
- skylan_q 12y ago
  Sure, it looks like code (in fact, VHDL's syntax is purposefully similar to ADA), but it sure isn't code. Computer science grad here. I had to keep reminding myself about the HDL part of VHDL. It's not algorithmic description like programming is, but hardware description.
- spacemanmatt 12y ago
  Would it be fair to describe it as concurrently executed code?
  - AceJohnny2 12y ago
    hah, that's only the tip of the iceberg... From memory: - HDL code doesn't have variables the way programming code does. Sure, you can store state in latches (and other more roundabout ways), but a good design tries to avoid this. - You can have "functions" that take parameters, but what you're really doing is instantiating blocks of hardware according to said parameters. - Instead of variables to functions, what you really care about is signals as input and output to hardware blocks. (and ultimately at the final hardware implementation, propagation time and power of said signals. Especially the clock. OMG the clock...) Honestly, I found VHDL made complete sense from approaching it after drawing digital circuit diagrams, as the description code mapped pretty clearly to that. Approaching it from an "imperative programming" background makes little sense, and saying it's "concurrent programming" just ends up confusing the issue more, IMHO.
    - ioseph 12y ago
      Absolutely agree with learning digital circuit design first. Before writing a single line of HDL, you should know exactly what you want to be synthesized. Unfortunately all to many courses approach like learning a new programming language. To me this is like teaching CAD before teaching how to draw a rectangle.
  - ohyes 12y ago
    It's more like wiring together a series of tubes. The signal has to propagate from one end of the tubes to the other in a single clock cycle. Note that the tubes can go backwards, so you can feed the output of the tube into the next input of itself. Hardware programming like this is actually extremely fun, but for some reason the widely available languages for doing it suck. And make what is going on in the hardware opaque and difficult to understand for any non trivial applications. (We're talking 100000s of lines of code to do anything nontrivial).
  - MootWoop 12y ago
- austinz 12y ago
  It's funny, because in some cases you can write HDL code that looks like a loop - but in this context a loop instantiates multiple instances of some piece of logic.
  - AceJohnny2 12y ago
    Exactly. And this kind of distinction was what we were having trouble conveying to said software guy (I say this as a software guy myself), and I think the author of the LISP CPU is having the same problem.
    - derefr 12y ago
      I think I'd explain that particular bit by simply saying that there was no run-time looping construct, only a compile-time looping macro to generate runtime code. Most software people would get that, I think.
- read 12y ago
  this guy needs to learn more Verilog That's not a bad thing. Maybe this is why a Lisp processor doesn't exist. Not only do you have to know Lisp well, which only a minority of programmers do, but you also need to want to know hardware. Which is something software people don't want to do. This guy already has a leg up. For some strange reason I can't explain it's easier to imagine a software guy building hardware than a hardware guy writing a Lisp.
  - jff 12y ago
    That seems odd when you consider that a Lisp can be implemented in, what, a couple hundred lines of C? All the guys who can design a processor know how to program, and it's not like Lisp is totally magical. Now, most people who do primarily hardware work probably aren't that interested in Lisp, because there's not really much Lisp focus out there. I'm a computer engineer, I know how to write HDL and lay silicon, I like Lisp... actually it would be a pretty fun project to do in an FPGA.
    - read 12y ago
      They know how to program. Do they know what to program?
- derefr 12y ago
  > this software guy was constantly trying to write functions and loops, and was having trouble with the concept that all signals were propagated concurrently rather than sequentially! Sounds like he hadn't written much software in a language with an actor-model. It's not nearly as hard a jump to VHDL if you've ever debugged an Erlang supervision tree, or a miscommunicating set of SOA web services.
- romaniv 12y ago
  If you teach Verilog without explaining why it has loops and what they do (and don't do), you don't teach it correctly. Behavioral descriptions are very, very similar to programming, and a lot of programming concepts and skills (e.g. modularization) translate very well to HDLs. The only thing in HDLs I remember that is totally alien to programmers is propagation delays. Well, even that is somewhat similar to multi-threading issues.

alain94040 12y ago

Let me know when you do so, I can help.

iso8859-1 12y ago

Won't you help us write this one: https://en.wikibooks.org/wiki/Programmable_Logic/Verilog https://en.wikibooks.org/wiki/Programmable_Logic/Verilog ?

alain94040 12y ago
I took a look and I don't know where to start. The table of content is completely different from how I would introduce the concepts. The site says "This book requires that you first read Digital Circuits", which is a good point, so maybe most of the design/Verilog content should go there instead. Unfortunately, the digital circuit book also doesn't have a modern table of content: SR flip-flops and 7400TLS are not exactly related to Verilog much at all. Is there a place where such issues can be discussed? EDIT: I started https://en.wikibooks.org/wiki/Programmable_Logic/Verilog_for_Software_Programmers https://en.wikibooks.org/wiki/Programmable_Logic/Verilog_for...
- jff 12y ago
  Both "books" are kind of regrettable, but SR flip-flops and 7400-type logic gates are essential background knowledge for writing HDL. You'll have a hard time describing hardware if you don't know what kind of hardware you're trying to describe... Verilog looks vaguely C-ish, but in the end you're describing how to connect up a bunch of flip-flops and logic gates.
  - adwn 12y ago
    In modern digital hardware design, you only use D flip-flops (with some very rare exceptions), so teaching SR, JK etc. is not only unnecessary, but also confusing to beginners. Showing how to build them from gates is even worse, because it's typically wrong and results in a level-triggered latch (which you don't use in modern digital hardware design). You don't build more complex functions like adders or multiplexers from individual gates anymore, so don't put beginners into this outdated mindset. Sure, explain how to build a half-adder from ANDs and XORs, but make it clear that they shouldn't do this for anything except experimentation; you don't need any specific parts like the 7400s for this. Instead, teach them proper design techniques with HDLs (as horrible as VHDL and Verilog are, they are better than schematic designs).

feider 12y ago

Just let us know when you have writen some tutorials - Im waiting :)

theon144 12y ago

Please do! I've wanted to learn FPGAs for years now, never really got around to it because it's really so niche there's not that much quality tutorials.