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I have always wanted to learn Verilog. However, I find it quite different from the typical programming language such as c or java. What is the best way for some

I have always wanted to learn Verilog. However, I find it quite different from the typical programming language such as c or java. What is the best way for someone who has programming experience to learn Verilog?

deadgrey19 12y ago
The first thing to know is that Verilog is not a programming language. It is a hardware description language. This may sound picky, but it fundamentally changes the way you need to think about using the language. With Verilog/VHDL/HDL, you describe a circuit, which requires very different thinking to programming languages where you describe a sequence of instructions. The other thing to know is that HDL languages are mostly the domain of electrical engineers and hence have suffered a lack of any "computer science" in them. The languages and all of the tools are clunky and reminiscent of 1970/1980's style programming when CS and EE diverged. Hence, do not expect to find decent online tutorials or freeware source code available. It's all locked up and proprietary as with all other EE tools. The best place is to start with a text book, this one (http://www.amazon.com/Fundamentals-Digital-Logic-Verilog-Design/dp/0073380547/ http://www.amazon.com/Fundamentals-Digital-Logic-Verilog-Des...) is a nice introduction to digital design with examples from Verilog. Personally I prefer VHDL, and this fantastic introduction (http://www.amazon.com/Circuit-Design-VHDL-Volnei-Pedroni/dp/0262162245/ http://www.amazon.com/Circuit-Design-VHDL-Volnei-Pedroni/dp/...) To make either of these useful, you will need a hardware platform and some tools to play with. The DE1/2 is a reasonably priced entry board with plenty of lights, switches and peripherals to play with at a reasonable cost and is well matched with the text books above. http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=165&No=83 http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=E...
- pjc50 12y ago
  Very true. The lack of implicit sequencing is the hardest thing for people to understand from an imperative programming background. You need a different set of conceptual structures such as the state machine and the pipeline. This is why the various C-to-Verilog tools remain niche, they can translate behaviour but not redesign for you. I also agree that it's stuck in the 70s, comparable to Fortran 77 or ALGOL. Bundling related signals and functionality together to produce something corresponding to an "object" or a "type" is basically impossible. All sorts of errors that could be caught automatically or discouraged by language design aren't. There's a lot of typing, and necessary duplication of effort. IDEs don't help much. Heavy unit and system testing is fortunately widespread. Because it's the only way to ensure you end up with something that actually works. I have a back-burner project to design a more modern language that compiles to Verilog which would make this sort of thing much more accessible.
- typon 12y ago
  1. I recommend that a newbie get a DE0 nano board. It's much cheaper than DE1/DE2 and has fun sensors like an accelerometer on it which can lead to pretty cool applications. I designed a quadcopter control system entirely on the DE0, using a NIOS II based Qsys system. The academic price is only $59: https://www.terasic.com.tw/cgi-bin/page/archive.pl?No=593 https://www.terasic.com.tw/cgi-bin/page/archive.pl?No=593 2. Fun fact: the cover of the Fundamentals of Digital Logic book has Chess on it because the author, Zvonko Vranesic, is not only an father in the FPGA/CAD industry, he is also an International Chess master. Also, he's quite good at ping pong for being 76 :(
  - swetland 12y ago
    Depends what you're doing -- DE0 Nano is nice for integrating into larger projects, but if you want to say implement a little CPU and peripherals, something like the plain 'ol DE0 is only slightly more expensive and has a bunch of buttons/switches/LEDs/7-seg-displays for just-getting-started projects as well as handy IO interfaces like VGA, PS2 mouse/keyboard, etc.
  - Florin_Andrei 12y ago
    > I designed a quadcopter control system entirely on the DE0, using a NIOS II based Qsys system. Any room left on silicon for things like computer vision (well, simple stuff, like recognizing a red ball), or is the whole thing pretty much dedicated to flying the quad? Also, could you share your design?
  - Florin_Andrei 12y ago
    Also, I wonder what everyone thinks of the LOGI boards: http://valentfx.com/ http://valentfx.com/
- sliverstorm 12y ago
  There is also the Basys, if you would rather go with Xilinx: http://www.digilentinc.com/Products/Catalog.cfm?NavPath=2,400&Cat=10 http://www.digilentinc.com/Products/Catalog.cfm?NavPath=2,40...
- Florin_Andrei 12y ago
  > Personally I prefer VHDL Could you describe why you prefer one over the other? Perhaps related to your particular application for FPGA? > and is well matched with the text books above. Is that likely to be true for the lesser DE0 model too?
  - deadgrey19 12y ago
    Verilog and VHDL are equivalent in the power of expressiveness, one is more or less interchangeable with the other. Both are supported by both major chip vendors (Xilinx and Altera). Although neither vendor supports anywhere near the latest versions of either of these languages which is frustrating. It may sound crazy, but I prefer VHDL because it is more verbose. The benefit of the verbosity is precision. with VHDL, you must specify exactly what you want, the syntax doesn't allow for ambiguity. With Verilog, you can let the "compiler" infer some things for you, but you need to think really hard if it will infer the right thing for you. The benefit is that you get to type fewer characters. Since I do not pay (or get paid) per character typed, it is far more important to me to type a little bit more, and get exactly the design I want. When designing circuits, one thing you cannot afford to be is lazy. It is all about precision, because if you get it wrong, there is no step through debugger to help you, and often, it will still work in simulation, but fail to work in real hardware, which means you're stuck. I can't say for certain with the latest version of the textbook, but IIRC, the version I had many years ago was specifically tied to the DE2. There were a range of exercises to go through with specific problem statements etc. IMHO, the DE1 is equivalent enough that you can change a few pin mappings and get the same result. I cannot say anything about the DE0.
cfallin 12y ago
The best advice I ever got when I started to play with Verilog and FPGAs in undergrad was that one should think of the circuit first, then write the Verilog to describe it. As another poster said, this isn't programming; there are no usual sequential semantics (first compute this, then assign that value) even though code samples may look that way. The tricky (slash insanely cool) thing about HDLs is that they infer a lot of things -- latches, MUXes, ALUs -- out of a high-level description. But the abstraction is leaky, so you need to understand digital logic (state machines, latches, pipelines, ...) and then work up from there. I guess what I'm really trying to say is, study digital logic first, then imagine the circuit you want to build, then write the Verilog that infers that circuit :-)

deadgrey19 12y ago

The first thing to know is that Verilog is not a programming language. It is a hardware description language. This may sound picky, but it fundamentally changes the way you need to think about using the language. With Verilog/VHDL/HDL, you describe a circuit, which requires very different thinking to programming languages where you describe a sequence of instructions. The other thing to know is that HDL languages are mostly the domain of electrical engineers and hence have suffered a lack of any "computer science" in them. The languages and all of the tools are clunky and reminiscent of 1970/1980's style programming when CS and EE diverged. Hence, do not expect to find decent online tutorials or freeware source code available. It's all locked up and proprietary as with all other EE tools. The best place is to start with a text book, this one (http://www.amazon.com/Fundamentals-Digital-Logic-Verilog-Design/dp/0073380547/ http://www.amazon.com/Fundamentals-Digital-Logic-Verilog-Des...) is a nice introduction to digital design with examples from Verilog. Personally I prefer VHDL, and this fantastic introduction (http://www.amazon.com/Circuit-Design-VHDL-Volnei-Pedroni/dp/0262162245/ http://www.amazon.com/Circuit-Design-VHDL-Volnei-Pedroni/dp/...) To make either of these useful, you will need a hardware platform and some tools to play with. The DE1/2 is a reasonably priced entry board with plenty of lights, switches and peripherals to play with at a reasonable cost and is well matched with the text books above. http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=165&No=83 http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=E...

pjc50 12y ago
Very true. The lack of implicit sequencing is the hardest thing for people to understand from an imperative programming background. You need a different set of conceptual structures such as the state machine and the pipeline. This is why the various C-to-Verilog tools remain niche, they can translate behaviour but not redesign for you. I also agree that it's stuck in the 70s, comparable to Fortran 77 or ALGOL. Bundling related signals and functionality together to produce something corresponding to an "object" or a "type" is basically impossible. All sorts of errors that could be caught automatically or discouraged by language design aren't. There's a lot of typing, and necessary duplication of effort. IDEs don't help much. Heavy unit and system testing is fortunately widespread. Because it's the only way to ensure you end up with something that actually works. I have a back-burner project to design a more modern language that compiles to Verilog which would make this sort of thing much more accessible.
typon 12y ago
1. I recommend that a newbie get a DE0 nano board. It's much cheaper than DE1/DE2 and has fun sensors like an accelerometer on it which can lead to pretty cool applications. I designed a quadcopter control system entirely on the DE0, using a NIOS II based Qsys system. The academic price is only $59: https://www.terasic.com.tw/cgi-bin/page/archive.pl?No=593 https://www.terasic.com.tw/cgi-bin/page/archive.pl?No=593 2. Fun fact: the cover of the Fundamentals of Digital Logic book has Chess on it because the author, Zvonko Vranesic, is not only an father in the FPGA/CAD industry, he is also an International Chess master. Also, he's quite good at ping pong for being 76 :(
- swetland 12y ago
  Depends what you're doing -- DE0 Nano is nice for integrating into larger projects, but if you want to say implement a little CPU and peripherals, something like the plain 'ol DE0 is only slightly more expensive and has a bunch of buttons/switches/LEDs/7-seg-displays for just-getting-started projects as well as handy IO interfaces like VGA, PS2 mouse/keyboard, etc.
- Florin_Andrei 12y ago
  > I designed a quadcopter control system entirely on the DE0, using a NIOS II based Qsys system. Any room left on silicon for things like computer vision (well, simple stuff, like recognizing a red ball), or is the whole thing pretty much dedicated to flying the quad? Also, could you share your design?
- Florin_Andrei 12y ago
  Also, I wonder what everyone thinks of the LOGI boards: http://valentfx.com/ http://valentfx.com/
sliverstorm 12y ago
There is also the Basys, if you would rather go with Xilinx: http://www.digilentinc.com/Products/Catalog.cfm?NavPath=2,400&Cat=10 http://www.digilentinc.com/Products/Catalog.cfm?NavPath=2,40...
Florin_Andrei 12y ago
> Personally I prefer VHDL Could you describe why you prefer one over the other? Perhaps related to your particular application for FPGA? > and is well matched with the text books above. Is that likely to be true for the lesser DE0 model too?
- deadgrey19 12y ago
  Verilog and VHDL are equivalent in the power of expressiveness, one is more or less interchangeable with the other. Both are supported by both major chip vendors (Xilinx and Altera). Although neither vendor supports anywhere near the latest versions of either of these languages which is frustrating. It may sound crazy, but I prefer VHDL because it is more verbose. The benefit of the verbosity is precision. with VHDL, you must specify exactly what you want, the syntax doesn't allow for ambiguity. With Verilog, you can let the "compiler" infer some things for you, but you need to think really hard if it will infer the right thing for you. The benefit is that you get to type fewer characters. Since I do not pay (or get paid) per character typed, it is far more important to me to type a little bit more, and get exactly the design I want. When designing circuits, one thing you cannot afford to be is lazy. It is all about precision, because if you get it wrong, there is no step through debugger to help you, and often, it will still work in simulation, but fail to work in real hardware, which means you're stuck. I can't say for certain with the latest version of the textbook, but IIRC, the version I had many years ago was specifically tied to the DE2. There were a range of exercises to go through with specific problem statements etc. IMHO, the DE1 is equivalent enough that you can change a few pin mappings and get the same result. I cannot say anything about the DE0.

cfallin 12y ago

The best advice I ever got when I started to play with Verilog and FPGAs in undergrad was that one should think of the circuit first, then write the Verilog to describe it. As another poster said, this isn't programming; there are no usual sequential semantics (first compute this, then assign that value) even though code samples may look that way. The tricky (slash insanely cool) thing about HDLs is that they infer a lot of things -- latches, MUXes, ALUs -- out of a high-level description. But the abstraction is leaky, so you need to understand digital logic (state machines, latches, pipelines, ...) and then work up from there. I guess what I'm really trying to say is, study digital logic first, then imagine the circuit you want to build, then write the Verilog that infers that circuit :-)