10 ms·

FPGA and Xeon combined in one socket

89 points by jsnell 12y ago

pbo 12y ago
If I recall correctly, Intel tried a few years ago to sell a system-on-chip combining an Atom CPU with a FPGA from Altera. I believe it didn't work very well, especially with regards to communication and synchronization between the two cores.
- deadgrey19 12y ago
  It didn't work very well, but there is a good reason: Nobody wanted a slow and comparatively low performance chip paired with a small FPGA connected via a (slow) PCI-express connect. There are hundreds of big FPGA boards with PCIe connectors that can be tied to big CPUs already. It was a non-product from the get-go.
rthomas6 12y ago
This is their competition: http://www.xilinx.com/products/silicon-devices/soc/zynq-7000/silicon-devices/index.htm http://www.xilinx.com/products/silicon-devices/soc/zynq-7000... Zynq has been out and working in industry for a couple years now.
- hga 12y ago
  I don't know how much competition they're giving Xilinx, but Altera is doing the same thing with the same high performance ARM core: http://www.altera.com/devices/processor/soc-fpga/overview/proc-soc-fpga.html http://www.altera.com/devices/processor/soc-fpga/overview/pr... As the fine article notes, Intel is now doing some fabbing for Altera. I've gotten the impression that putting a general purpose CPU in the corner of an FPGA was a pretty standard thing. One of the things that should differentiate this new effort from Intel is FPGA "direct access to the Xeon cache hierachy and system memory" per "general manager of Intel's data center group, Diane Bryant".
  - rthomas6 12y ago
    Direct cache access sounds cool, but I'm sort of under the impression that Altera and Intel are playing catchup with the FPGA SoC idea. I believe Xilinx was the first mover by a large margin, though I could be wrong. That doesn't mean Xilinx's Zynq will always be the best product, but it is already for sale right now, is an established product, and works well.
    - blackguardx 12y ago
      FPGAs with CPU cores have been around for over a decade. The difference is that in the past, the industry has mostly focused on the PowerPC core. Now that ARM has such tremendous popularity, it makes sense to focus on it.
      - rjsw 12y ago
        It made sense for Xilinx to use PowerPC in the past, the chips were being fabbed by IBM.
pling 12y ago
Sold! Seriously. This is what I wanted for the last two decades.
retroencabulato 12y ago
A good time to know Verilog.
ddalex 12y ago
This may be huge. People will use the FPGA as they use the GPU now, but FPGA has the potential to greatly reduce the programming complexity associated with GPUs. In the end, the success will boil down to how easy the development is, and how well designed the libraries will be - if the framwork will be capable to automatically reconfigure the hardware to offload CPU-intensive tasks, this has high tech potential for widespread adoption, not just datacenter-wise.
- nomnombunty 12y ago
  Can you elaborate on how FPGA has the potential to reduce programming complexity associated with GPUs? I personally think it is harder to program with Verilog than to program using CUDA.
  - deleted 12y ago
    [deleted]
  - hderms 12y ago
    Well it's probably easier to program CUDA for embarassingly parallel tasks, or other tasks well-suited to CUDA, but FPGAs might make certain tasks easier because of their flexibility.
pjc50 12y ago
The barrier to adoption of FPGAs is not so much the hardware issue as the toolchain issue. The toolchains are closed, frequently windows-only, slow, and not friendly to newbies. (Not that shader language or CUDA is that accessible, but you can play with shaders in a browser now. The time to "hello world" or equivalent isn't too bad)
- mc_electron 12y ago
  Actually the build chain for both Xilinx and Altera works quite well in Linux, in fact I have heard that some consider it superior based on memory management issues. Modelsim is available on Linux as well, but only their more expensive SE product. They charge a premium for Linux platform.
  - deadgrey19 12y ago
    My experience (http://www.cl.cam.ac.uk/research/security/ctsrd/cheri.html http://www.cl.cam.ac.uk/research/security/ctsrd/cheri.html, http://netfpga.org/10G_specs.html http://netfpga.org/10G_specs.html) is that both of the toolchains are terrible on both of the platforms. Xilinx and Altera keep trying to convince us that they are software vendors, when in actual fact they are hardware vendors. Rarely is a company good at both.
    - swetland 12y ago
      That the toolchains run on Linux at all at least prevents one from being forced to use Windows, which is a plus, but yes, the state of FPGA tools is pretty horrible. It reminds me of the days of proprietary vendor compilers where every platform vendor had their own subtly incompatible and/or differently buggy C or C++ compiler. In this way the FPGA development model is a decade or two behind software workflows.
    - skylan_q 12y ago
      I've explored the Xilinx tools extensively during graduate school. It was by far the most complicated thing I've ever had the misfortune of using. I remember there being far too many tools and features that overlap in function and purpose to that point that none of the tools were great.
peterwwillis 12y ago
"Intel reveals its FrankenChip ARM killer: one FPGA and one Xeon IN ONE SOCKET Scattered reports of maniacal cackling amid driving rain and lightning at Chipzilla's lab" Is this just a Register thing, or do all UK rags use this kind of unprofessional hyperbole? It's literally the most annoying thing in the world.
- Aqwis 12y ago
  The Register is 50% satire and 50% tech news. Don't take it seriously.
- pjmlp 12y ago
  This is typical UK, and for me what makes reading UK computer magazines like the old Computer Shopper so interesting. There is always some kind of British humour on the articles.
msandford 12y ago
This gets even bigger if they throw their IP muscle behind it like they do with ICC. If you can get (for pay or free) fast matrix multiply, FFT, crypto, etc cores for the FPGA you will see even faster adoption. If they're clever enough to make some of those IP cores available to say MATLAB adoption will be faster still. Nothing sells hardware easier than "do no extra work but spend another couple of grand and see your application speed up significantly"
- rdrdss23 12y ago
  Can you elaborate on what you're trying to say? MATLAB already have MATLAB->HDL, which works very well. We have a team that uses it exclusively for FPGA programming.
  - msandford 12y ago
    MATLAB will recognize if you've got FFTW or ATLAS or other highly tuned numerical libraries installed. And MATLAB will then use them whenever possible. If Intel does a good enough job of providing a collection of compute kernels and the surrounding CPU libraries to make using them roughly as "easy" as CUDA then a lot of people will pick that up. I don't have any hard numbers but I would suspect that there are a great many more people who use MATLAB on a CPU than those who do MATLAB->HDL. So what I'm speculating about is that Intel might support those folks who use MATLAB on a CPU for more general purpose things. Does that make more sense?
- xooyoozoo 12y ago
  And those libraries will likely be OpenCL-based and nicely portable to Intel's Xeon Phi options.
- deleted 12y ago
  [deleted]
nomnombunty 12y ago
I have always wanted to learn Verilog. However, I find it quite different from the typical programming language such as c or java. What is the best way for someone who has programming experience to learn Verilog?
- deadgrey19 12y ago
  The first thing to know is that Verilog is not a programming language. It is a hardware description language. This may sound picky, but it fundamentally changes the way you need to think about using the language. With Verilog/VHDL/HDL, you describe a circuit, which requires very different thinking to programming languages where you describe a sequence of instructions. The other thing to know is that HDL languages are mostly the domain of electrical engineers and hence have suffered a lack of any "computer science" in them. The languages and all of the tools are clunky and reminiscent of 1970/1980's style programming when CS and EE diverged. Hence, do not expect to find decent online tutorials or freeware source code available. It's all locked up and proprietary as with all other EE tools. The best place is to start with a text book, this one (http://www.amazon.com/Fundamentals-Digital-Logic-Verilog-Design/dp/0073380547/ http://www.amazon.com/Fundamentals-Digital-Logic-Verilog-Des...) is a nice introduction to digital design with examples from Verilog. Personally I prefer VHDL, and this fantastic introduction (http://www.amazon.com/Circuit-Design-VHDL-Volnei-Pedroni/dp/0262162245/ http://www.amazon.com/Circuit-Design-VHDL-Volnei-Pedroni/dp/...) To make either of these useful, you will need a hardware platform and some tools to play with. The DE1/2 is a reasonably priced entry board with plenty of lights, switches and peripherals to play with at a reasonable cost and is well matched with the text books above. http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=165&No=83 http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=E...
  - pjc50 12y ago
    Very true. The lack of implicit sequencing is the hardest thing for people to understand from an imperative programming background. You need a different set of conceptual structures such as the state machine and the pipeline. This is why the various C-to-Verilog tools remain niche, they can translate behaviour but not redesign for you. I also agree that it's stuck in the 70s, comparable to Fortran 77 or ALGOL. Bundling related signals and functionality together to produce something corresponding to an "object" or a "type" is basically impossible. All sorts of errors that could be caught automatically or discouraged by language design aren't. There's a lot of typing, and necessary duplication of effort. IDEs don't help much. Heavy unit and system testing is fortunately widespread. Because it's the only way to ensure you end up with something that actually works. I have a back-burner project to design a more modern language that compiles to Verilog which would make this sort of thing much more accessible.
mindcreek 12y ago
Hmm, this might have implications for digital currencies and their mining.
- deadgrey19 12y ago
  Unlikely. Custom built Application Specific Integrated Circuits (ASICs) (i.e. bitcoin mining chips - e.g http://www.butterflylabs.com/ http://www.butterflylabs.com/) will always be faster than FPGAs (which are comparatively slow) and CPUs (which are fast, but general).
  - tromp 12y ago
    Except that every other months or so sees the introduction of a new proof-of-work system that won't have ASICs for years, if ever. FPGAs can easily outperform the CPU/GPU competition on any alt-coin using such proof-of-work.
YZF 12y ago
Sounds like a bit of a gimmick. FPGAs are typically used in ASIC development to emulate the ASIC being developed. I've seen boards with 20 FPGAs emulate an ASIC design at <~1/10th of the speed at >>x10 power. While FPGAs are programmable hardware they are far less efficient than custom hardware for various reasons. Naturally ASIC emluation is an application where FPGAs have a very large advantage over software... At volume they're also a lot more expensive and good tools are also very expensive (virtually no mass produced commercial product uses FPGAs). Now obviously if the FPGA is inside the Xeon you're not really paying much more for it (except you lose whatever other function could be crammed in there). Companies like Microsoft, Facebook, Google have enough servers to make a custom block inside Intel's CPU more attractive than an FPGA in terms of price/power/performance (and they can get that from ARM vendors which is probably scaring Intel). CPU vendors have spent the last several decades moving more and more applications that used to be in the realm of custom hardware to the realm of software. There are certainly niches of highly parallelizable operations but a lot of general purpose compute is very well served by CPUs (and a lot of it is often memory bandwidth bound, not compute bound). Some of these niches have already been semi-filled through GPUs, special instructions etc. The FPGA on the Xeon is almost certainly not going to have access to all the same interfaces that either a GPU or the CPU has and is only going to be useful for a relatively narrow range of applications. I think what's going on here is that as the process size goes down simply cramming more and more cores into the chip makes less and less sense, i.e. things don't scale linearly in general. So the first thing we see is cramming a GPU in there which eventually also doesn't scale (and also isn't really a server thing). Now they basically have extra space and don't really know what to put in it. Also each of the current blocks (GPU, CPU) are so complicated that trying to evolve them is very expensive. EDIT: Just to explain a little where I'm coming from here. I worked for a startup designing an ASIC where FPGAs were used to validate the ASIC design. I also worked on commercial products that included FPGAs for custom functions where the volume was not high enough to justify an ASIC and the problem couldn't be solved by software. I worked with DSPs, CPUs, various forms of programmable logic, SoCs with lots of different HW blocks etc. over a long long time so I'm trying to share some of my observations... If you think they're absolutely wrong I'd be happy to debate them. EDIT2: Re-reading what I wrote it may sound like I am saying I am an ASIC designer. I'm not. I'm a software developer who has dabbled in hardware design and has worked in hardware design environments (i.e. the startup I worked for was designing ASICs but I was mostly working on related software).

89 points by jsnell 12y ago

pbo 12y ago

If I recall correctly, Intel tried a few years ago to sell a system-on-chip combining an Atom CPU with a FPGA from Altera. I believe it didn't work very well, especially with regards to communication and synchronization between the two cores.

deadgrey19 12y ago
It didn't work very well, but there is a good reason: Nobody wanted a slow and comparatively low performance chip paired with a small FPGA connected via a (slow) PCI-express connect. There are hundreds of big FPGA boards with PCIe connectors that can be tied to big CPUs already. It was a non-product from the get-go.

rthomas6 12y ago

This is their competition: http://www.xilinx.com/products/silicon-devices/soc/zynq-7000/silicon-devices/index.htm http://www.xilinx.com/products/silicon-devices/soc/zynq-7000... Zynq has been out and working in industry for a couple years now.

hga 12y ago
I don't know how much competition they're giving Xilinx, but Altera is doing the same thing with the same high performance ARM core: http://www.altera.com/devices/processor/soc-fpga/overview/proc-soc-fpga.html http://www.altera.com/devices/processor/soc-fpga/overview/pr... As the fine article notes, Intel is now doing some fabbing for Altera. I've gotten the impression that putting a general purpose CPU in the corner of an FPGA was a pretty standard thing. One of the things that should differentiate this new effort from Intel is FPGA "direct access to the Xeon cache hierachy and system memory" per "general manager of Intel's data center group, Diane Bryant".
- rthomas6 12y ago
  Direct cache access sounds cool, but I'm sort of under the impression that Altera and Intel are playing catchup with the FPGA SoC idea. I believe Xilinx was the first mover by a large margin, though I could be wrong. That doesn't mean Xilinx's Zynq will always be the best product, but it is already for sale right now, is an established product, and works well.
  - blackguardx 12y ago
    FPGAs with CPU cores have been around for over a decade. The difference is that in the past, the industry has mostly focused on the PowerPC core. Now that ARM has such tremendous popularity, it makes sense to focus on it.
    - rjsw 12y ago
      It made sense for Xilinx to use PowerPC in the past, the chips were being fabbed by IBM.

pling 12y ago

Sold! Seriously. This is what I wanted for the last two decades.

retroencabulato 12y ago

A good time to know Verilog.

ddalex 12y ago

This may be huge. People will use the FPGA as they use the GPU now, but FPGA has the potential to greatly reduce the programming complexity associated with GPUs. In the end, the success will boil down to how easy the development is, and how well designed the libraries will be - if the framwork will be capable to automatically reconfigure the hardware to offload CPU-intensive tasks, this has high tech potential for widespread adoption, not just datacenter-wise.

nomnombunty 12y ago
Can you elaborate on how FPGA has the potential to reduce programming complexity associated with GPUs? I personally think it is harder to program with Verilog than to program using CUDA.
- deleted 12y ago
  [deleted]
- hderms 12y ago
  Well it's probably easier to program CUDA for embarassingly parallel tasks, or other tasks well-suited to CUDA, but FPGAs might make certain tasks easier because of their flexibility.

pjc50 12y ago

The barrier to adoption of FPGAs is not so much the hardware issue as the toolchain issue. The toolchains are closed, frequently windows-only, slow, and not friendly to newbies. (Not that shader language or CUDA is that accessible, but you can play with shaders in a browser now. The time to "hello world" or equivalent isn't too bad)

mc_electron 12y ago
Actually the build chain for both Xilinx and Altera works quite well in Linux, in fact I have heard that some consider it superior based on memory management issues. Modelsim is available on Linux as well, but only their more expensive SE product. They charge a premium for Linux platform.
- deadgrey19 12y ago
  My experience (http://www.cl.cam.ac.uk/research/security/ctsrd/cheri.html http://www.cl.cam.ac.uk/research/security/ctsrd/cheri.html, http://netfpga.org/10G_specs.html http://netfpga.org/10G_specs.html) is that both of the toolchains are terrible on both of the platforms. Xilinx and Altera keep trying to convince us that they are software vendors, when in actual fact they are hardware vendors. Rarely is a company good at both.
  - swetland 12y ago
    That the toolchains run on Linux at all at least prevents one from being forced to use Windows, which is a plus, but yes, the state of FPGA tools is pretty horrible. It reminds me of the days of proprietary vendor compilers where every platform vendor had their own subtly incompatible and/or differently buggy C or C++ compiler. In this way the FPGA development model is a decade or two behind software workflows.
  - skylan_q 12y ago
    I've explored the Xilinx tools extensively during graduate school. It was by far the most complicated thing I've ever had the misfortune of using. I remember there being far too many tools and features that overlap in function and purpose to that point that none of the tools were great.

peterwwillis 12y ago

"Intel reveals its FrankenChip ARM killer: one FPGA and one Xeon IN ONE SOCKET Scattered reports of maniacal cackling amid driving rain and lightning at Chipzilla's lab" Is this just a Register thing, or do all UK rags use this kind of unprofessional hyperbole? It's literally the most annoying thing in the world.

Aqwis 12y ago
The Register is 50% satire and 50% tech news. Don't take it seriously.
pjmlp 12y ago
This is typical UK, and for me what makes reading UK computer magazines like the old Computer Shopper so interesting. There is always some kind of British humour on the articles.

msandford 12y ago

This gets even bigger if they throw their IP muscle behind it like they do with ICC. If you can get (for pay or free) fast matrix multiply, FFT, crypto, etc cores for the FPGA you will see even faster adoption. If they're clever enough to make some of those IP cores available to say MATLAB adoption will be faster still. Nothing sells hardware easier than "do no extra work but spend another couple of grand and see your application speed up significantly"

rdrdss23 12y ago
Can you elaborate on what you're trying to say? MATLAB already have MATLAB->HDL, which works very well. We have a team that uses it exclusively for FPGA programming.
- msandford 12y ago
  MATLAB will recognize if you've got FFTW or ATLAS or other highly tuned numerical libraries installed. And MATLAB will then use them whenever possible. If Intel does a good enough job of providing a collection of compute kernels and the surrounding CPU libraries to make using them roughly as "easy" as CUDA then a lot of people will pick that up. I don't have any hard numbers but I would suspect that there are a great many more people who use MATLAB on a CPU than those who do MATLAB->HDL. So what I'm speculating about is that Intel might support those folks who use MATLAB on a CPU for more general purpose things. Does that make more sense?
xooyoozoo 12y ago
And those libraries will likely be OpenCL-based and nicely portable to Intel's Xeon Phi options.
deleted 12y ago
[deleted]

nomnombunty 12y ago

I have always wanted to learn Verilog. However, I find it quite different from the typical programming language such as c or java. What is the best way for someone who has programming experience to learn Verilog?

deadgrey19 12y ago
The first thing to know is that Verilog is not a programming language. It is a hardware description language. This may sound picky, but it fundamentally changes the way you need to think about using the language. With Verilog/VHDL/HDL, you describe a circuit, which requires very different thinking to programming languages where you describe a sequence of instructions. The other thing to know is that HDL languages are mostly the domain of electrical engineers and hence have suffered a lack of any "computer science" in them. The languages and all of the tools are clunky and reminiscent of 1970/1980's style programming when CS and EE diverged. Hence, do not expect to find decent online tutorials or freeware source code available. It's all locked up and proprietary as with all other EE tools. The best place is to start with a text book, this one (http://www.amazon.com/Fundamentals-Digital-Logic-Verilog-Design/dp/0073380547/ http://www.amazon.com/Fundamentals-Digital-Logic-Verilog-Des...) is a nice introduction to digital design with examples from Verilog. Personally I prefer VHDL, and this fantastic introduction (http://www.amazon.com/Circuit-Design-VHDL-Volnei-Pedroni/dp/0262162245/ http://www.amazon.com/Circuit-Design-VHDL-Volnei-Pedroni/dp/...) To make either of these useful, you will need a hardware platform and some tools to play with. The DE1/2 is a reasonably priced entry board with plenty of lights, switches and peripherals to play with at a reasonable cost and is well matched with the text books above. http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=165&No=83 http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=E...
- pjc50 12y ago
  Very true. The lack of implicit sequencing is the hardest thing for people to understand from an imperative programming background. You need a different set of conceptual structures such as the state machine and the pipeline. This is why the various C-to-Verilog tools remain niche, they can translate behaviour but not redesign for you. I also agree that it's stuck in the 70s, comparable to Fortran 77 or ALGOL. Bundling related signals and functionality together to produce something corresponding to an "object" or a "type" is basically impossible. All sorts of errors that could be caught automatically or discouraged by language design aren't. There's a lot of typing, and necessary duplication of effort. IDEs don't help much. Heavy unit and system testing is fortunately widespread. Because it's the only way to ensure you end up with something that actually works. I have a back-burner project to design a more modern language that compiles to Verilog which would make this sort of thing much more accessible.

mindcreek 12y ago

Hmm, this might have implications for digital currencies and their mining.

deadgrey19 12y ago
Unlikely. Custom built Application Specific Integrated Circuits (ASICs) (i.e. bitcoin mining chips - e.g http://www.butterflylabs.com/ http://www.butterflylabs.com/) will always be faster than FPGAs (which are comparatively slow) and CPUs (which are fast, but general).
- tromp 12y ago
  Except that every other months or so sees the introduction of a new proof-of-work system that won't have ASICs for years, if ever. FPGAs can easily outperform the CPU/GPU competition on any alt-coin using such proof-of-work.

YZF 12y ago

Sounds like a bit of a gimmick. FPGAs are typically used in ASIC development to emulate the ASIC being developed. I've seen boards with 20 FPGAs emulate an ASIC design at <~1/10th of the speed at >>x10 power. While FPGAs are programmable hardware they are far less efficient than custom hardware for various reasons. Naturally ASIC emluation is an application where FPGAs have a very large advantage over software... At volume they're also a lot more expensive and good tools are also very expensive (virtually no mass produced commercial product uses FPGAs). Now obviously if the FPGA is inside the Xeon you're not really paying much more for it (except you lose whatever other function could be crammed in there). Companies like Microsoft, Facebook, Google have enough servers to make a custom block inside Intel's CPU more attractive than an FPGA in terms of price/power/performance (and they can get that from ARM vendors which is probably scaring Intel). CPU vendors have spent the last several decades moving more and more applications that used to be in the realm of custom hardware to the realm of software. There are certainly niches of highly parallelizable operations but a lot of general purpose compute is very well served by CPUs (and a lot of it is often memory bandwidth bound, not compute bound). Some of these niches have already been semi-filled through GPUs, special instructions etc. The FPGA on the Xeon is almost certainly not going to have access to all the same interfaces that either a GPU or the CPU has and is only going to be useful for a relatively narrow range of applications. I think what's going on here is that as the process size goes down simply cramming more and more cores into the chip makes less and less sense, i.e. things don't scale linearly in general. So the first thing we see is cramming a GPU in there which eventually also doesn't scale (and also isn't really a server thing). Now they basically have extra space and don't really know what to put in it. Also each of the current blocks (GPU, CPU) are so complicated that trying to evolve them is very expensive. EDIT: Just to explain a little where I'm coming from here. I worked for a startup designing an ASIC where FPGAs were used to validate the ASIC design. I also worked on commercial products that included FPGAs for custom functions where the volume was not high enough to justify an ASIC and the problem couldn't be solved by software. I worked with DSPs, CPUs, various forms of programmable logic, SoCs with lots of different HW blocks etc. over a long long time so I'm trying to share some of my observations... If you think they're absolutely wrong I'd be happy to debate them. EDIT2: Re-reading what I wrote it may sound like I am saying I am an ASIC designer. I'm not. I'm a software developer who has dabbled in hardware design and has worked in hardware design environments (i.e. the startup I worked for was designing ASICs but I was mostly working on related software).