I've got memories of a lab actually doing a wafer scale FPGA in the mid 90's. The reference escapes me, but if I can find it I'll post it. As you suggested, t

I've got memories of a lab actually doing a wafer scale FPGA in the mid 90's. The reference escapes me, but if I can find it I'll post it. As you suggested, they preserved the yield by routing around defects. --- Edit: Or it might have been a PGA, rather than an FPGA.