Aren't they unique in using DRAM for the lowest level of onboard cache, and therefore have a lot of it since those are just tiny cells that store a charge for a

Aren't they unique in using DRAM for the lowest level of onboard cache, and therefore have a lot of it since those are just tiny cells that store a charge for a while? Yeah, starting with the POWER7. POWER8 has 96 MiB of eDRAM (e for embedded). The Centaur memory controllers also have 16 MiB of eDRAM, max them out at 8 and you get 128 total at L4. Compared to Intel's current offerings, the L1 data cache and L2 unified cache are twice as big. Don't know about timings, though. The biggest Intel Ivy Bridge Xeon server CPUs have slightly more transistors (100 million), but on a much smaller die, 31% less area. Look at the ones with 12 and 15 native cores: https://en.wikipedia.org/wiki/Ivy_Bridge_(microarchitecture)#Server_processors https://en.wikipedia.org/wiki/Ivy_Bridge_(microarchitecture)... they list at $2336 to $6841.