Given that we seem to be hitting the practical limit on CPU frequencies, it's interesting to speculate on what kind of (single thread) IPC headroom is still ava

Given that we seem to be hitting the practical limit on CPU frequencies, it's interesting to speculate on what kind of (single thread) IPC headroom is still available. You can model those IPC limitations by assuming a CPU with unlimited registers, unlimited functional units, a perfect branch predictor, etc. and seeing how much ILP you can extract from benchmark code. Tighten the CPU's constraints and you get a sense of which capabilities are most valuable. Wall 1991[1] is the classic paper, AFAIK, and saw a limit with "quite ambitious" (for 1991) imagined future hardware at around 5-7 IPC in a 'median' benchmark. I'd be interested to hear how close Intel is getting and whether anyone's updated that result. [1] http://www.eecs.harvard.edu/~dbrooks/cs146-spring2004/wall-ilp.pdf http://www.eecs.harvard.edu/~dbrooks/cs146-spring2004/wall-i...