As long as design teams only focus on their one little portion of the chip, without any overarching goal of global optimization, we're leaving a ton of performa

As long as design teams only focus on their one little portion of the chip, without any overarching goal of global optimization, we're leaving a ton of performance on the table Parameters like register file size are not determined in design (except where simple physics dictates). That's an architecture problem, which is constrained by the quality of simulation capabilities (which you did mention). Another interesting thought- the design of a CPU starts many years before it hits shelves. So to accurately model performance (to make good decisions), architects must simulate a CPU running the code of five years in the future! There are some things that stay constant- tight loops, high level branches... but what about multithreading, for example? How multithreaded will the software of 2019 be?