5 ms·
CPUs are getting faster. Sandy Bridge is a 15-20% IPC improvement on Nehalem for some heavily integer and memory access based workloads. On the same workloads,
by delroth 12y ago
CPUs are getting faster. Sandy Bridge is a 15-20% IPC improvement on Nehalem for some heavily integer and memory access based workloads. On the same workloads, Haswell is another 15-20% IPC improvement on Sandy Bridge.
I work on the Dolphin Emulator (https://dolphin-emu.org/ https://dolphin-emu.org/) which is a very CPU intensive program (emulates a 730MHz PowerPC core, plus a GPU, plus a DSP, all of that in realtime). We try and track CPU improvements to provide our users with proper recommandations on what hardware to go for. Here are the results of a CPU benchmark based on our software: https://docs.google.com/spreadsheet/ccc?key=0AunYlOAfGABxdFQ0UzJyTFAxbzZhYWtGcGwySlRFa1E#gid=0 https://docs.google.com/spreadsheet/ccc?key=0AunYlOAfGABxdFQ...
- twoodfin 12y agoGiven that we seem to be hitting the practical limit on CPU frequencies, it's interesting to speculate on what kind of (single thread) IPC headroom is still available. You can model those IPC limitations by assuming a CPU with unlimited registers, unlimited functional units, a perfect branch predictor, etc. and seeing how much ILP you can extract from benchmark code. Tighten the CPU's constraints and you get a sense of which capabilities are most valuable. Wall 1991[1] is the classic paper, AFAIK, and saw a limit with "quite ambitious" (for 1991) imagined future hardware at around 5-7 IPC in a 'median' benchmark. I'd be interested to hear how close Intel is getting and whether anyone's updated that result. [1] http://www.eecs.harvard.edu/~dbrooks/cs146-spring2004/wall-ilp.pdf http://www.eecs.harvard.edu/~dbrooks/cs146-spring2004/wall-i...