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Oh boy VHDL, got my final on that on Tuesday. Nice to have learned it, but personally I appreciate the abstraction provided, by even C. What is the applicabili
by tonglil 13y ago
Oh boy VHDL, got my final on that on Tuesday.
Nice to have learned it, but personally I appreciate the abstraction provided, by even C.
What is the applicability of this skill in the modern chip development industry?
- jevinskie 13y agoHave you checked out the two-process method described in [0]? I used it to implement a dual-core MIPS subset with some relative ease. It was definitely better than dataflow style! Using records and enums also greatly improves ModelSim waveforms. A project done in dataflow: https://github.com/jevinskie/aes-over-pcie/tree/master/source https://github.com/jevinskie/aes-over-pcie/tree/master/sourc... The MIPS project in two-process: https://github.com/jevinskie/mips--/tree/master/project4/source https://github.com/jevinskie/mips--/tree/master/project4/sou... [0]: http://www.gaisler.com/doc/vhdl2proc.pdf http://www.gaisler.com/doc/vhdl2proc.pdf
- oflordal 13y agoVerilog is more commonly used especially in the ASIC industry. VHDL is disappearing in Europe as well were it used to have some foothold. That said most chip developers are very conservative only using a subset of already limited languages like Verilog so switching between them should come easy.
- abfan1127 13y agoIts my understanding that VHDL is limited to mostly military contractors. The rest of the world uses SystemVerilog. I think UVM is a far better methodology to learn.
- Brashman 13y agoHigh level synthesis for C is not quite there yet to be used as a replacement for Verilog or VHDL, especially for high performance hardware. Verilog and VHDL are still commonly used for hardware design.