Almost all DRAM has some amount of address scrambling--logically adjacent cells are not physically adjacent. It can get quite complicated. Here's a PDF that d

Almost all DRAM has some amount of address scrambling--logically adjacent cells are not physically adjacent. It can get quite complicated. Here's a PDF that describes some of the why and how: http://ce-publications.et.tudelft.nl/publications/1162_address_and_data_scrambling_causes_and_impact_on_memory_te.pdf http://ce-publications.et.tudelft.nl/publications/1162_addre... I have been told that a quick way to reverse engineer the scrambling is to shine a circular pattern onto the physical dram, then read out the data and test common scramblings until the logical data shows the same circle.