"As programmers we don't explicitly control how our RAM communicates with the CPU; we let the underlying abstractions handle it." Except for when we don't, bec

"As programmers we don't explicitly control how our RAM communicates with the CPU; we let the underlying abstractions handle it." Except for when we don't, because the underlying abstractions sometimes do the wrong thing. Random paper on cache-optimizing and the hassles thereof: http://research.microsoft.com/en-us/um/people/trishulc/papers/Cache-conscious.pdf http://research.microsoft.com/en-us/um/people/trishulc/paper... The challenge is that even the memory abstraction leaks a little, and the network is nowhere near as fast or reliable as the frontside bus: "abstracting away" a 100ms+ link latency and/or nontrivial packet loss means hitting that leak much sooner.